1,307 research outputs found
Tightness for a family of recursion equations
In this paper we study the tightness of solutions for a family of recursion
equations. These equations arise naturally in the study of random walks on
tree-like structures. Examples include the maximal displacement of a branching
random walk in one dimension and the cover time of a symmetric simple random
walk on regular binary trees. Recursion equations associated with the
distribution functions of these quantities have been used to establish weak
laws of large numbers. Here, we use these recursion equations to establish the
tightness of the corresponding sequences of distribution functions after
appropriate centering. We phrase our results in a fairly general context, which
we hope will facilitate their application in other settings.Comment: Published in at http://dx.doi.org/10.1214/08-AOP414 the Annals of
Probability (http://www.imstat.org/aop/) by the Institute of Mathematical
Statistics (http://www.imstat.org
Poisson-Dirichlet branching random walks
We determine, to within O(1), the expected minimal position at level n in
certain branching random walks. The walks under consideration have displacement
vector (v_1,v_2,...), where each v_j is the sum of j independent Exponential(1)
random variables and the different v_i need not be independent. In particular,
our analysis applies to the Poisson-Dirichlet branching random walk and to the
Poisson-weighted infinite tree. As a corollary, we also determine the expected
height of a random recursive tree to within O(1).Comment: Published in at http://dx.doi.org/10.1214/12-AAP840 the Annals of
Applied Probability (http://www.imstat.org/aap/) by the Institute of
Mathematical Statistics (http://www.imstat.org
Artin's primitive root conjecture -a survey -
This is an expanded version of a write-up of a talk given in the fall of 2000
in Oberwolfach. A large part of it is intended to be understandable by
non-number theorists with a mathematical background. The talk covered some of
the history, results and ideas connected with Artin's celebrated primitive root
conjecture dating from 1927. In the update several new results established
after 2000 are also discussed.Comment: 87 pages, 512 references, to appear in Integer
Tamari lattices and parking functions: proof of a conjecture of F. Bergeron
An m-ballot path of size n is a path on the square grid consisting of north
and east unit steps, starting at (0,0), ending at (mn,n), and never going below
the line {x=my. The set of these paths can be equipped with a lattice
structure, called the m-Tamari lattice and denoted by T_n^(m), which
generalizes the usual Tamari lattice T_n obtained when m=1. This lattice was
introduced by F. Bergeron in connection with the study of coinvariant spaces.
He conjectured several intriguing formulas dealing with the enumeration of
intervals in this lattice. One of them states that the number of intervals in
T_n^(m) is This conjecture
was proved recently, but in a non-bijective way, while its form strongly
suggests a connection with plane trees. Here, we prove another conjecture of
Bergeron, which deals with the number of labelled, intervals. An interval [P,Q]
of T_n^(m) is labelled, if the north steps of Q are labelled from 1 to n in
such a way the labels increase along any sequence of consecutive north steps.
We prove that the number of labelled intervals in T_n^(m) is The form of these numbers suggests a connection with
parking functions, but our proof is non-bijective. It is based on a recursive
description of intervals, which translates into a functional equation satisfied
by the associated generating function. This equation involves a derivative and
a divided difference, taken with respect to two additional variables. Solving
this equation is the hardest part of the paper. Finding a bijective proof
remains an open problem.Comment: 21 pp. This paper is now subsumed by arXiv:1202.5925, and will not be
submitted to any journa
New Combinatorial Properties and Algorithms for AVL Trees
In this thesis, new properties of AVL trees and a new partitioning of binary search trees named
core partitioning scheme are discussed, this scheme is applied to three binary search trees namely AVL trees, weight-balanced trees, and plain binary search trees.
We introduce the core partitioning scheme, which maintains a balanced search tree as a dynamic
collection of complete balanced binary trees called cores. Using this technique we achieve the same theoretical efficiency of modern cache-oblivious data structures by using classic data structures such as weight-balanced trees or height balanced trees (e.g. AVL trees). We preserve the original topology and algorithms of the given balanced search tree using a simple post-processing with guaranteed performance to completely rebuild the changed cores (possibly all of them) after each update. Using our core partitioning scheme, we simultaneously achieve good memory allocation, space-efficient representation, and cache-obliviousness. We also apply this scheme to arbitrary binary search trees which can be unbalanced and we produce a new data structure, called Cache-Oblivious General Balanced Tree (COG-tree).
Using our scheme, searching a key requires O(log_B n) block transfers and O(log n) comparisons
in the external-memory and in the cache-oblivious model. These complexities are theoretically efficient. Interestingly, the core partition for weight-balanced trees and COG-tree can be maintained with amortized O(log_B n) block transfers per update, whereas maintaining the core partition for AVL trees requires more than a poly-logarithmic amortized cost.
Studying the properties of these trees also lead us to some other new properties of AVL trees
and trees with bounded degree, namely, we present and study gaps in AVL trees and we prove Tarjan et al.'s conjecture on the number of rotations in a sequence of deletions and insertions
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An enhanced GPU architecture for not-so-regular parallelism with special implications for database search
textGraphics Processing Units (GPUs) have become a popular platform for executing general purpose (i.e., non-graphics) applications. To run efficiently on a GPU, applications must be parallelized into many threads, each of which performs the same task but operates on different data (i.e., data parallelism). Previous work has shown that some applications experience significant speedup when executed on a GPU instead of a CPU. The applications that benefit most tend to have certain characteristics such as high computational intensity, regular control-flow and memory access patterns, and little to no communication among threads. However, not all parallel applications have these characteristics. Applications with a more balanced compute to memory ratio, divergent control flow, irregular memory accesses, and/or frequent communication (i.e., not-so-regular applications) will not take full advantage of the GPU's resources, resulting in performance far short of what could be delivered. The goal of this dissertation is to enhance the GPU architecture to better handle not-so-regular parallelism. This is accomplished in two parts. First, I analyze a diverse set of data parallel applications that suffer from divergent control-flow and/or significant stall time due to memory. I propose two microarchitectural enhancements to the GPU called the Large Warp Microarchitecture and Two-Level Warp Scheduling to address these problems respectively. When combined, these mechanisms increase performance by 19% on average. Second, I examine one of the most important and fundamental applications in computing: database search. Database search is an excellent example of an application that is rich in parallelism, but rife with not-so-regular characteristics. I propose enhancements to the GPU architecture including new instructions that improve intra-warp thread communication and decision making, and also a row-buffer locality hint bit to better handle the irregular memory access patterns of index-based tree search. These proposals improve performance by 21% for full table scans, and 39% for index-based search. The result of this dissertation is an enhanced GPU architecture that better handles not-so-regular parallelism. This increases the scope of applications that run efficiently on the GPU, making it a more viable platform not only for current parallel workloads such as databases, but also for future and emerging parallel applications.Electrical and Computer Engineerin
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