High Efficiency Cross-Coupled Charge Pump Circuit with Four-Clock Signals

© Allerton Press, Inc. 2018A fully integrated cross-coupled charge pump circuit for boosting dc-to-dc converter applications with four-clock signals has been proposed. With the new clock scheme, this charge pump eliminates all of the reversion power loss and reduces the ripple voltage. In addition, the largest voltage differences between the terminals of all transistors do not exceed the power supply voltage for solving the gate-oxide overstress problem in the conventional charge pump circuits and enhancing the reliability. This proposed charge pump circuit does not require any extra level shifter; therefore, the power efficiency is increased. The proposed charge pump circuit has been simulated using Spectre in the TSMC 0.18 μm CMOS process. The simulation results show that the maximum voltage conversion efficiency of the new 3-stage cross-coupled circuit with an input voltage of 1.5Vis 99.8%. According to the comparison results of the conventional pump and the enhanced charge pump proposed, the output ripple voltage has been significantly reduced.Peer reviewe

A robust high-efficiency cross-coupled charge pump circuit without blocking transistors

This document is the Accepted Manuscript version of the following article: Minglin Ma, Xinglong Cai, Yichuang Sun, and Nike George, ‘A robust high-efficiency cross-coupled charge pump circuit without blocking transistors’, Analog Integrated Circuits and Signal Processing, Vol. 95 (3): 395-401, June 2018. Under embargo until 16 March 2019. The final publication is available at Springer via: https://doi.org/10.1007/s10470-018-1149-xA fully integrated cross-coupled charge pump circuit with a new clock scheme has been presented in this paper. The new clock scheme ensures that all NMOS pre-charge transistors are turned off when the voltages of main clock signals are high. Notably, all PMOS transfer transistors will be turned off when the voltages of the main clock signals are low. As a result, the charge pump eliminates all of the reversion power loss and reduces the ripple voltage. The proposed charge pump has a better performance even in scenarios where the main clock signals are mismatched. The proposed charge pump circuit was simulated using spectre in the TSMC 0.18 µm CMOS process. The simulation results show that the proposed charge pump circuit has a high voltage conversion efficiency and low ripple voltage.Peer reviewe

A Low Power FinFET Charge Pump For Energy Harvesting Applications

Indiana University-Purdue University Indianapolis (IUPUI)With the growing popularity and use of devices under the great umbrella that is the Internet of Things (IoT), the need for devices that are smaller, faster, cheaper and require less power is at an all time high with no intentions of slowing down. This is why many current research efforts are very focused on energy harvesting. Energy harvesting is the process of storing energy from external and ambient sources and delivering a small amount of power to low power IoT devices such as wireless sensors or wearable electronics. A charge pumps is a circuit used to convert a power supply to a higher or lower voltage depending on the specific application. Charge pumps are generally seen in memory design as a verity of power supplies are required for the newer memory technologies. Charge pumps can be also be designed for low voltage operation and can convert a smaller energy harvesting voltage level output to one that may be needed for the IoT device to operate. In this work, an integrated FinFET (Field Effect Transistor) charge pump for low power energy harvesting applications is proposed. The design and analysis of this system was conducted using Cadence Virtuoso Schematic L-Editing, Analog Design Environment and Spectre Circuit Simulator tools using the 7nm FinFETs from the ASAP7 7nm PDK. The research conducted here takes advantage of some inherent characteristics that are present in FinFET technologies, including low body effects, and faster switching speeds, lower threshold voltage and lower power consumption. The lower threshold voltage of the FinFET is key to get great performance at lower supply voltages. The charge pump in this work is designed to pump a 150mV power supply, generated from an energy harvester, to a regulated 650mV, while supplying 1uA of load current, with a 20mV voltage ripple in steady state (SS) operation. At these conditions, the systems power consumption is 4.85uW and is 31.76% efficient. Under no loading conditions, the charge pump reaches SS operation in 50us, giving it the fastest rise time of the compared state of the art efforts mentioned in this work. The minimum power supply voltage for the system to function is 93mV where it gives a regulated output voltage of $25mV. FinFET technology continues to be a very popular design choice and even though it has been in production since Intel's Ivy-Bridge processor in 2012, it seems that very few efforts have been made to use the advantages of FinFETs for charge pump design. This work shows though simulation that FinFET charge pumps can match the performance of charge pumps implemented in other technologies and should be considered for low power designs such as energy harvesting

Irrigation Management in Pakistan and India: Comparing Notes on Institutions and Policies

irrigation management / productivity / privatization / irrigated farming / equity / water distribution / groundwater management / economic aspects / tube wells / price policy / electricity supplies / pumps / India / Pakistan /

An Evaluation of 2-phase Charge Pump Topologies with Charge Transfer Switches for Green Mobile Technology

The development of charge pumps has been motivated by the power supply requirements of portable electronic devices. Charge pumps are inductorless DC-DC converters that are small size and high integration. The quality of the charge pump greatly depends on the effectiveness of switches to turn on and off at the designated clock phases. However, to date, no analysis has been carried out on the overall performance of charge pumps based on switch components in practice. This work demonstrates the characteristics of transistors as charge transfer switches and their effects on the performance of a charge pump. Three most common charge pump topologies are evaluated in terms of voltage drop due to on-resistance and charge loss per switch. Simulations are performed in 0.35μm Austriamicrosystems (AMS) technology for Dickson, Voltage Doubler and Makowski charge pump topologies in steady and dynamic states. In addition, the effect of switch parameters for different charge pump topologies are compared and analysed. We demonstrate that the Makowski charge pump is the topology for future green mobile technology

A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems-On-A-Chip

The advent of battery operated sensor-based electronic systems has provided a pressing need to design energy-efficient, ultra-low power integrated circuits as a means to improve the battery lifetime. This dissertation describes a scheme to lower the power requirement of a digital circuit through the use of charge-recycling and dynamic supply-voltage scaling techniques. The novel charge-recycling scheme proposed in this research demonstrates the feasibility of operating digital circuits using the charge scavenged from the leakage and dynamic load currents inherent to digital design. The proposed scheme efficiently gathers the “ground-bound” charge into storage capacitor banks. This reclaimed charge is then subsequently recycled to power the source digital circuit. The charge-recycling methodology has been implemented on a 12-bit Gray-code counter operating at frequencies of less than 50 MHz. The circuit has been designed in a 90-nm process and measurement results reveal more than 41% reduction in the average energy consumption of the counter. The total energy savings including the power consumed for the generation of control signals aggregates to an average of 23%. The proposed methodology can be applied to an existing digital path without any design change to the circuit but with only small loss to the performance. Potential applications of this scheme are described, specifically in wide-temperature dynamic power reduction and as a source for energy harvesters. The second part of this dissertation deals with the design and development of a self-starting, ultra-low voltage, switched-capacitor (SC) DC-DC converter that is essential to an energy harvesting system. The proposed charge-pump based SC-converter operates from 125-mV input and thus enables battery-less operation in ultra-low voltage energy harvesters. The charge pump does not require any external components or expensive post-fabrication processing to enable low-voltage operation. This design has been implemented in a 130-nm CMOS process. While the proposed charge pump provides significant efficiency enhancement in energy harvesters, it can also be incorporated within charge recycling systems to facilitate adaptable charge-recycling levels. In total, this dissertation provides key components needed for highly energy-efficient mixed signal systems-on-a-chip

High-efficiency high voltage hybrid charge pump design with an improved chip area

A hybrid charge pump was developed in a 0.13- $\mu \text{m}$ Bipolar-CMOS-DMOS (BCD) process which utilised high drain-source voltage MOS devices and low-voltage integrated metal-insulator-metal (MIM) capacitors. The design consisted of a zero-reversion loss cross-coupled stage and a new self-biased serial-parallel charge pump design. The latter has been shown to have an area reduction of 60% in comparison to a Schottky diode-based Dickson charge pump operating at the same frequency. Post-layout simulations were carried out which demonstrated a peak efficiency of 38% at the output voltage of 18.5 V; the maximum specified output voltage of 27 V was also achieved. A standalone serial-parallel charge pump was shown to have a better transient response and a flatter efficiency curve; these are preferable for time-sensitive applications with a requirement of a broader range of output currents. These findings have significant implications for reducing the total area of implantable high-voltage devices without sacrificing charge pump efficiency or maximum output voltage

Efficient adaptive switch design for charge pumps in micro-scale energy harvesting

The performance of Micro-scale energy harvesting unit depends on the efficient design of charge-pump. Optimization of the dimension of MOSFET switches in charge pump is one of the techniques to improve the efficiency. In this work, a new optimization technique for transistor sizing and a concept of reconfigurable adaptive switches has been introduced to maximize the extracted power. A control unit is designed for adaptive reconfiguration of the switches. These proposed techniques are validated for linear charge-pump topology in UMC 180nm technology. Combined effect of size optimization of switch along with reconfigurable switch offers an improvement up to 23.5% in the net harvested power with 6% less silicon area

On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications

This paper presents experimental results from a system that comprises a fully autonomous energy harvester with a solar cell of 1 mm 2 as energy transducer and a Power Management Unit (PMU) on the same silicon substrate, and an output voltage regulator. Both chips are implemented in standard 0.18 μm CMOS technology with total layout areas of 1.575 mm 2 and 0.0126 mm 2 , respectively. The system also contains an off-the-shelf 3.2 mm × 2.5 mm × 0.9 mm supercapacitor working as an off-chip battery or energy reservoir between the PMU and the voltage regulator. Experimental results show that the fast energy recovery of the on-chip solar cell and PMU permits the system to replenish the supercapacitor with enough charge as to sustain Bluetooth Low Energy (BLE) communications even with input light powers of 510 nW. The whole system is able to self-start-up without external mechanisms at 340 nW. This work is the first step towards a self-supplied sensor node with processing and communication capabilities. The small form factor and ultra-low power consumption of the system components is in compliance with biomedical applications requirementsThis work was supported in part by the Spanish Government (Ministerio de Ciencia, Innovación y Universidades) under Project RTI2018-097088-B-C32 and Project RTI2018-095994-B-I00 (MICINN/FEDER), in part by the Xunta de Galicia, in part by the Consellería de Cultura, Educación e Ordenación Universitaria (accreditation 2016-2019, ED431G/08 and reference competitive group 2017-2020, ED431C 2017/69) and European Regional Development Fund (ERDF), and in part by the Junta de Extremadura and the ERDF, under Grant IB 18079S