Capacity -based parameter optimization of bandwidth constrained CPM

Continuous phase modulation (CPM) is an attractive modulation choice for bandwidth limited systems due to its small side lobes, fast spectral decay and the ability to be noncoherently detected. Furthermore, the constant envelope property of CPM permits highly power efficient amplification. The design of bit-interleaved coded continuous phase modulation is characterized by the code rate, modulation order, modulation index, and pulse shape. This dissertation outlines a methodology for determining the optimal values of these parameters under bandwidth and receiver complexity constraints. The cost function used to drive the optimization is the information-theoretic minimum ratio of energy-per-bit to noise-spectral density found by evaluating the constrained channel capacity. The capacity can be reliably estimated using Monte Carlo integration. A search for optimal parameters is conducted over a range of coded CPM parameters, bandwidth efficiencies, and channels. Results are presented for a system employing a trellis-based coherent detector. To constrain complexity and allow any modulation index to be considered, a soft output differential phase detector has also been developed.;Building upon the capacity results, extrinsic information transfer (EXIT) charts are used to analyze a system that iterates between demodulation and decoding. Convergence thresholds are determined for the iterative system for different outer convolutional codes, alphabet sizes, modulation indices and constellation mappings. These are used to identify the code and modulation parameters with the best energy efficiency at different spectral efficiencies for the AWGN channel. Finally, bit error rate curves are presented to corroborate the capacity and EXIT chart designs

Physical Layer Simulation Study for the Co-existence of WLAN Standards

Interference is a prime factor that limits the performance of devices within the 2.4 GHz ISM Band. Due to the ISM Band being unlicensed and free to all users, there is an abundance of devices within this frequency range. The three most prominent of such devices used for data communication consist of Bluetooth, Wifi, and Zigbee. In order to understand whether these three protocols can co-exist with each other, a physical layer system model will be developed for each protocol. These systems models will be combined and their interaction with each other examined to determine the effects of the interference under different channel conditions. The channel models will consist of general AWGN and Rayleigh fading channels, along with a site-specific case involving both Ricean and Rayleigh fading

Investigation of Techniques for Reducing Mobile Communication Systems Harmful Out-Of-Band Emission

Electromagnetic compatibility in the newly designated Long-Term Evolution (LTE) mobile network in the 790–862 MHz frequency band from perspective of interference management between neighbouring services are analysed in the dissertation. Main focal point of this dissertation is on the problems that face LTE networks based on Orthogonal Frequency-Division Multiplexing (OFDM) due to the relatively strong side lobes around the active subcarriers in the main communication channel, which introduces interference effects between LTE stations and other services. The introductory chapter presents the investigated problem, objects of research, importance of the dissertation, describes research methodology, scientific novelty and the defended statements. The situation in the 790–862 MHz frequency band is overviewed regarding most sensitive challenges in the first chapter: LTE stations’ influence on Short-Range Devices (SRD), digital terrestrial TV broadcasting (DVB-T) and aeronautical radio navigation systems (ARNS). The noticeable lack of information is observed regarding SRD and LTE electromagnetic compatibility. The Filter Bank Multicarrier Transmission technique (FBMC) is pro-posed as means to minimize adjacent band interference in the 790–862 MHz frequency band. Main FBMC benefits are presented through comparison with reference case of OFDM. The key advantage of FBMC technique is derived from its low out-of-band leakage, which guarantees minimum harmful interference level between stations using adjacent channels. The harmful interference of LTE mobile stations’ influence on Short-Range Devices operating in the 863–870 MHz frequency band is analysed in the second chapter. Two analysis methods are used in this study: first applying theoretical analysis using Minimum Coupling Loss calculations, then statistical Monte-Carlo in order to verify results obtained in theoretical approach. The third chapter is focused on the experimental analysis to reproduce the situation that was investigated in theoretical analysis chapter. Verification of theoretical analysis by practical measurements confirmed that the LTE user equipment (UE) emissions may affect SRD devices and completely or partially disrupt their communications at distances of up to several meters from LTE UE. The obtained results are summarized and general conclusions are drawn

Recent Trends in Communication Networks

In recent years there has been many developments in communication technology. This has greatly enhanced the computing power of small handheld resource-constrained mobile devices. Different generations of communication technology have evolved. This had led to new research for communication of large volumes of data in different transmission media and the design of different communication protocols. Another direction of research concerns the secure and error-free communication between the sender and receiver despite the risk of the presence of an eavesdropper. For the communication requirement of a huge amount of multimedia streaming data, a lot of research has been carried out in the design of proper overlay networks. The book addresses new research techniques that have evolved to handle these challenges

Low Power Decoding Circuits for Ultra Portable Devices

A wide spread of existing and emerging battery driven wireless devices do not necessarily demand high data rates. Rather, ultra low power, portability and low cost are the most desired characteristics. Examples of such applications are wireless sensor networks (WSN), body area networks (BAN), and a variety of medical implants and health-care aids. Being small, cheap and low power for the individual transceiver nodes, let those to be used in abundance in remote places, where access for maintenance or recharging the battery is limited. In such scenarios, the lifetime of the battery, in most cases, determines the lifetime of the individual nodes. Therefore, energy consumption has to be so low that the nodes remain operational for an extended period of time, even up to a few years. It is known that using error correcting codes (ECC) in a wireless link can potentially help to reduce the transmit power considerably. However, the power consumption of the coding-decoding hardware itself is critical in an ultra low power transceiver node. Power and silicon area overhead of coding-decoding circuitry needs to be kept at a minimum in the total energy and cost budget of the transceiver node. In this thesis, low power approaches in decoding circuits in the framework of the mentioned applications and use cases are investigated. The presented work is based on the 65nm CMOS technology and is structured in four parts as follows: In the first part, goals and objectives, background theory and fundamentals of the presented work is introduced. Also, the ECC block in coordination with its surrounding environment, a low power receiver chain, is presented. Designing and implementing an ultra low power and low cost wireless transceiver node introduces challenges that requires special considerations at various levels of abstraction. Similarly, a competitive solution often occurs after a conclusive design space exploration. The proposed decoder circuits in the following parts are designed to be embedded in the low power receiver chain, that is introduced in the first part. Second part, explores analog decoding method and its capabilities to be embedded in a compact and low power transceiver node. Analog decod- ing method has been theoretically introduced over a decade ago that followed with early proof of concept circuits that promised it to be a feasible low power solution. Still, with the increased popularity of low power sensor networks, it has not been clear how an analog decoding approach performs in terms of power, silicon area, data rate and integrity of calculations in recent technologies and for low data rates. Ultra low power budget, small size requirement and more relaxed demands on data rates suggests a decoding circuit with limited complexity. Therefore, the four-state (7,5) codes are considered for hardware implementation. Simulations to chose the critical design factors are presented. Consequently, to evaluate critical specifications of the decoding circuit, three versions of analog decoding circuit with different transistor dimensions fabricated. The measurements results reveal different trade-off possibilities as well as the potentials and limitations of the analog decoding approach for the target applications. Measurements seem to be crucial, since the available computer-aided design (CAD) tools provide limited assistance and precision, given the amount of calculations and parameters that has to be included in the simulations. The largest analog decoding core (AD1) takes 0.104mm2 on silicon and the other two (AD2 and AD3) take 0.035mm2 and 0.015mm2, respectively. Consequently, coding gain in trade-off with silicon area and throughput is presented. The analog decoders operate with 0.8V supply. The achieved coding gain is 2.3 dB at bit error rates (BER)=0.001 and 10 pico-Joules per bit (pJ/b) energy efficiency is reached at 2 Mbps. Third part of this thesis, proposes an alternative low power digital decoding approach for the same codes. The desired compact and low power goal has been pursued by designing an equivalent digital decoding circuit that is fabricated in 65nm CMOS technology and operates in low voltage (near-threshold) region. The architecture of the design is optimized in system and circuit levels to propose a competitive digital alternative. Similarly, critical specifications of the decoder in terms of power, area, data rate (speed) and integrity are reported according to the measurements. The digital implementation with 0.11mm2 area, consumes minimum energy at 0.32V supply which gives 9 pJ/b energy efficiency at 125 kb/s and 2.9 dB coding gain at BER=0.001. The forth and last part, compares the proposed design alternatives based on the fabricated chips and the results attained from the measurements to conclude the most suitable solution for the considered target applications. Advantages and disadvantages of both approaches are discussed. Possible extensions of this work is introduced as future work

Advanced Trends in Wireless Communications

Physical limitations on wireless communication channels impose huge challenges to reliable communication. Bandwidth limitations, propagation loss, noise and interference make the wireless channel a narrow pipe that does not readily accommodate rapid flow of data. Thus, researches aim to design systems that are suitable to operate in such channels, in order to have high performance quality of service. Also, the mobility of the communication systems requires further investigations to reduce the complexity and the power consumption of the receiver. This book aims to provide highlights of the current research in the field of wireless communications. The subjects discussed are very valuable to communication researchers rather than researchers in the wireless related areas. The book chapters cover a wide range of wireless communication topics

Optimising and evaluating designs for reconfigurable hardware

Growing demand for computational performance, and the rising cost for chip design and manufacturing make reconfigurable hardware increasingly attractive for digital system implementation. Reconfigurable hardware, such as field-programmable gate arrays (FPGAs), can deliver performance through parallelism while also providing flexibility to enable application builders to reconfigure them. However, reconfigurable systems, particularly those involving run-time reconfiguration, are often developed in an ad-hoc manner. Such an approach usually results in low designer productivity and can lead to inefficient designs. This thesis covers three main achievements that address this situation. The first achievement is a model that captures design parameters of reconfigurable hardware and performance parameters of a given application domain. This model supports optimisations for several design metrics such as performance, area, and power consumption. The second achievement is a technique that enhances the relocatability of bitstreams for reconfigurable devices, taking into account heterogeneous resources. This method increases the flexibility of modules represented by these bitstreams while reducing configuration storage size and design compilation time. The third achievement is a technique to characterise the power consumption of FPGAs in different activity modes. This technique includes the evaluation of standby power and dedicated low-power modes, which are crucial in meeting the requirements for battery-based mobile devices

INVESTIGATION OF DYNAMIC RESPONSES OF ON-ROTOR WIRELESS SENSORS FOR CONDITION MONITORING OF ROTATING MACHINES

The most common sensors that are used to monitor the condition of a machine health are wired accelerometers. The big advantages of using these types of accelerometers are their high performance and good stability. However, they have certain drawbacks as well. These accelerometers are large in size and require a cable for external power source. Hence a more reliable and cheaper alternatives of these conventional accelerometers are needed that can eliminate the drawbacks of the wired accelerometers. This thesis reports the application of wireless Micro-Electro-Mechanical System (MEMS) accelerometer for machinery condition monitoring. These sensors are so small that they can be easily mounted on the rotating machine parts and can acquire dynamic information very accurately. One critical problem in using an on-rotor accelerometer is to extract the true tangential acceleration from the MEMS outputs. In this research, the mathematical model of an on-rotor triaxial MEMS accelerometer output signals is studied, and methods to eliminate the gravitational effect projected on X-axis (tangential direction) are proposed. The true tangential acceleration that correlates to the instantaneous angular speed (IAS) is reconstructed by combining two orthogonal outputs from the sensor that also contain gravitational accelerations. To provide more accurate dynamic characteristics of the rotating machine and hence achieving high-performance monitoring, a tiny MEMS accelerometer (AX3 data logger) has been used to obtain the on-rotor acceleration data for monitoring a two-stage reciprocating compressor (RC) based on the reconstruction of instantaneous angular speed (IAS). The findings from the experiments show that the conditions of the RC can be monitored and different faults can be identified using only one on-rotor MEMS accelerometer installed on compressor’ flywheel. In addition, the data collection method is improved by considering the wireless data transmission technique which enables online condition monitoring of the compressor. Thus, a wireless MEMS accelerometer node is mounted on the RC to measure the on-rotor acceleration signals. The node allows the measured acceleration data to be streamed to a remote host computer via Bluetooth Low Energy (BLE) module. In addition, the device is miniaturised so that can be conveniently mounted on a rotating rotor and can be driven by a battery powered microcontroller. To benchmark the wireless sensor performance, an incremental optical encoder was installed on the compressor flywheel to acquire the instantaneous angular speed (IAS) signal. Furthermore, conventional accelerometer mounted on the machine’s housing provide lower accuracy in diagnosis the faults for planetary gearboxes because of the planet gears’ varying mesh excitation due to its carrier movement. In contrast, installation of the smaller AX3 MEMS accelerometers is done at diametrically opposite direction to the each other of the planetary gearbox’s low-speed input shaft, allowing measurement of the acceleration signals which are used for condition monitoring of the gearbox. The findings from the experiments demonstrate that when tangential acceleration is measured at the planetary gearbox’s low-speed input shaft, effective fault identification is possible, offering reliability and economy in monitoring the health of planetary gearboxes