Efficient Dual Output Regulating Rectifier and Adiabatic Charge Pump for Biomedical Applications Employing Wireless Power Transfer †

A power management unit (PMU) is an essential block for diversified multi-functional low-power Internet of Things (IoT) and biomedical electronics. This paper includes a theoretical analysis of a high current, single-stage ac-dc, reconfigurable, dual output, regulating rectifier consisting of pulse width modulation (PWM) and pulse frequency modulation (PFM). The regulating rectifier provides two independently regulated supply voltages of 1.8 V and 3.3 V from an input ac voltage. The PFM control feedback consists of feedback-driven regulation to adjust the driving frequency of the power transistors through adaptive buffers in the active rectifier. The PWM/PFM mode control provides a feedback loop to adjust the conduction duration accurately and minimize power losses. The design also includes an adiabatic charge pump (CP) to provide a higher voltage level. The adiabatic CP consists of latch-up and power-saving topologies to enhance its power efficiency. Simulation results show that the dual regulating rectifier has 94.3% voltage conversion efficiency with an ac input magnitude of 3.5 Vp. The power conversion efficiency of the regulated 3.3 V output voltage is 82.3%. The adiabatic CP has an overall voltage conversion efficiency (VCE) of 92.9% with a total on-chip capacitance of 60 pF. The circuit was designed using 180 nm CMOS technology

Power Management Circuits for Energy Harvesting Applications

Energy harvesting is the process of converting ambient available energy into usable electrical energy. Multiple types of sources are can be used to harness environmental energy: solar cells, kinetic transducers, thermal energy, and electromagnetic waves. This dissertation proposal focuses on the design of high efficiency, ultra-low power, power management units for DC energy harvesting sources. New architectures and design techniques are introduced to achieve high efficiency and performance while achieving maximum power extraction from the sources. The first part of the dissertation focuses on the application of inductive switching regulators and their use in energy harvesting applications. The second implements capacitive switching regulators to minimize the use of external components and present a minimal footprint solution for energy harvesting power management. Analysis and theoretical background for all switching regulators and linear regulators are described in detail. Both solutions demonstrate how low power, high efficiency design allows for a self-sustaining, operational device which can tackle the two main concerns for energy harvesting: maximum power extraction and voltage regulation. Furthermore, a practical demonstration with an Internet of Things type node is tested and positive results shown by a fully powered device from harvested energy. All systems were designed, implemented and tested to demonstrate proof-of-concept prototypes

High Efficiency Power Management Unit for Implantable Optical-Electrical Stimulators

Battery-less active implantable devices are of interest because they offer longer life span and eliminate costly battery replacement surgical interventions. This is possible as a result of advances in inductive power transfer and development of power management circuits to maximize the overall power transfer and provide various voltage levels for multi-functional implantable devices. Rehabilitation therapy using optical stimulation of genetically modified peripheral neurons requires high current loads. Standard rectification topologies are inefficient and have associated voltage drops unsuited for miniaturized implants. This paper presents an integrated power management unit (PMU) for an optical-electrical stimulator to be used in the treatment of motor neurone disease. It includes a power-efficient regulating rectifier with a novel body biased high-speed comparator providing 3.3 V for the operation of the stimulator, a 3-stage latch-up charge pump with 12 V output for the input stage of the optical-electrical stimulator, and 1.8 V for digital control logic. The chip was fabricated in a 0.18 μm CMOS process. Measured results show that for a regulated output of 3.3 V delivering 30.3 mW power, the peak power conversion efficiency is 84.2% at 6.78 MHz inductive link tunable frequency reducing to 70.3% at 13.56 MHz. The charge pump with on chip capacitors has 90.9% measured voltage conversion efficiency

Ultra-Low Power Transmitter and Power Management for Internet-of-Things Devices

Two of the most critical components in an Internet-of-Things (IoT) sensing and transmitting node are the power management unit (PMU) and the wireless transmitter (Tx). The desire for longer intervals between battery replacements or a completely self-contained, battery-less operation via energy harvesting transducers and circuits in IoT nodes demands highly efficient integrated circuits. This dissertation addresses the challenge of designing and implementing power management and Tx circuits with ultra-low power consumption to enable such efficient operation. The first part of the dissertation focuses on the study and design of power management circuits for IoT nodes. This opening portion elaborates on two different areas of the power management field: Firstly, a low-complexity, SPICE-based model for general low dropout (LDO) regulators is demonstrated. The model aims to reduce the stress and computation times in the final stages of simulation and verification of Systems-on-Chip (SoC), including IoT nodes, that employ large numbers of LDOs. Secondly, the implementation of an efficient PMU for an energy harvesting system based on a thermoelectric generator transducer is discussed. The PMU includes a first-in-its-class LDO with programmable supply noise rejection for localized improvement in the suppression. The second part of the dissertation addresses the challenge of designing an ultra- low power wireless FSK Tx in the 900 MHz ISM band. To reduce the power consumption and boost the Tx energy efficiency, a novel delay cell exploiting current reuse is used in a ring-oscillator employed as the local oscillator generator scheme. In combination with an edge-combiner PA, the Tx showed a measured energy efficiency of 0.2 nJ/bit and a normalized energy efficiency of 3.1 nJ/(bit∙mW) when operating at output power levels up to -10 dBm and data rates of 3 Mbps. To close this dissertation, the implementation of a supply-noise tolerant BiCMOS ring-oscillator is discussed. The combination of a passive, high-pass feedforward path from the supply to critical nodes in the selected delay cell and a low cost LDO allow the oscillator to exhibit power supply noise rejection levels better than –33 dB in experimental results

Design of a Programmable Passive SoC for Biomedical Applications Using RFID ISO 15693/NFC5 Interface

Low power, low cost inductively powered passive biotelemetry system involving fully customized RFID/NFC interface base SoC has gained popularity in the last decades. However, most of the SoCs developed are application specific and lacks either on-chip computational or sensor readout capability. In this paper, we present design details of a programmable passive SoC in compliance with ISO 15693/NFC5 standard for biomedical applications. The integrated system consists of a 32-bit microcontroller, a sensor readout circuit, a 12-bit SAR type ADC, 16 kB RAM, 16 kB ROM and other digital peripherals. The design is implemented in a 0.18 μ m CMOS technology and used a die area of 1.52 mm × 3.24 mm. The simulated maximum power consumption of the analog block is 592 μ W. The number of external components required by the SoC is limited to an external memory device, sensors, antenna and some passive components. The external memory device contains the application specific firmware. Based on the application, the firmware can be modified accordingly. The SoC design is suitable for medical implants to measure physiological parameters like temperature, pressure or ECG. As an application example, the authors have proposed a bioimplant to measure arterial blood pressure for patients suffering from Peripheral Artery Disease (PAD)

Power Supply Rejection Improvement Techniques In Low Drop-Out Voltage Regulators

Low drop out (LDO) voltage regulators are widely used for post regulating the switching ripples generated by the switched mode power supplies (SMPS). Due to demand for portable applications, industry is pushing for complete system on chip power management solutions. Hence, the switching frequencies of the SMPS are increasing to allow higher level of integration. Therefore, the subsequent post-regulator LDO must have good power supply rejection (PSR) up to switching frequencies of SMPS. Unfortunately, the conventional LDOs have poor PSR at high frequencies. The objective of this research is to develop novel LDO regulators that can achieve good high frequency PSR performance. In this thesis, two PSR improvement methods are presented. The first method proposes a novel power supply noise-cancelling scheme to improve the PSR of an external-capacitor LDO. The proposed power supply noise-cancelling scheme is designed using adaptive power consumption, thereby not degrading the power efficiency of the LDO. The second method proposes a feed forward ripple cancellation technique to improve the PSR of capacitor-less LDO; also a dynamically powered transient improvement scheme has been proposed. The feed forward ripple cancellation is designed by reusing the load transient improvement block, thus achieving the improvement in PSR with no additional power consumption. Both the projects have been designed in TSMC 0.18 μm technology. The first method achieves a PSR of 66 dB up to 1 MHz where as the second method achieves a 55 dB PSR up to 1 MHz

A fully-integrated 180 nm CMOS 1.2 V low-dropout regulator for low-power portable applications

This paper presents the design and postlayout simulation results of a capacitor-less low dropout (LDO) regulator fully integrated in a low-cost standard 180 nm Complementary Metal-Oxide-Semiconductor (CMOS) technology which regulates the output voltage at 1.2 V from a 3.3 to 1.3 V battery over a -40 to 120 degrees C temperature range. To meet with the constraints of system-on-chip (SoC) battery-operated devices, ultralow power (I-q = 8.6 mu A) and minimum area consumption (0.109 mm(2)) are maintained, including a reference voltage V-ref = 0.4 V. It uses a high-gain dynamically biased folded-based error amplifier topology optimized for low-voltage operation that achieves an enhanced regulation-fast transient performance trade-off

Wireless power transfer for combined sensing and stimulation in implantable biomedical devices

Actuellement, il existe une forte demande de Headstage et de microsystèmes intégrés implantables pour étudier l’activité cérébrale de souris de laboratoire en mouvement libre. De tels dispositifs peuvent s’interfacer avec le système nerveux central dans les paradigmes électriques et optiques pour stimuler et surveiller les circuits neuronaux, ce qui est essentiel pour découvrir de nouveaux médicaments et thérapies contre des troubles neurologiques comme l’épilepsie, la dépression et la maladie de Parkinson. Puisque les systèmes implantables ne peuvent pas utiliser une batterie ayant une grande capacité en tant que source d’énergie primaire dans des expériences à long terme, la consommation d’énergie du dispositif implantable est l’un des principaux défis de ces conceptions. La première partie de cette recherche comprend notre proposition de la solution pour diminuer la consommation d’énergie des microcircuits implantables. Nous proposons un nouveau circuit de décalage de niveau qui convertit les niveaux de signaux sub-seuils en niveaux ultra-bas à haute vitesse en utilisant une très faible puissance et une petite zone de silicium, ce qui le rend idéal pour les applications de faible puissance. Le circuit proposé introduit une nouvelle topologie de décaleur de niveau de tension utilisant un condensateur de décalage de niveau pour augmenter la plage de tensions de conversion, tout en réduisant considérablement le retard de conversion. Le circuit proposé atteint un délai de propagation plus court et une zone de silicium plus petite pour une fréquence de fonctionnement et une consommation d’énergie donnée par rapport à d’autres solutions de circuit. Les résultats de mesure sont présentés pour le circuit proposé fabriqué dans un processus CMOS TSMC de 0,18- mm. Le circuit présenté peut convertir une large gamme de tensions d’entrée de 330 mV à 1,8 V et fonctionner sur une plage de fréquence de 100 Hz à 100 MHz. Il a un délai de propagation de 29 ns et une consommation d’énergie de 61,5 nW pour les signaux d’entrée de 0,4 V, à une fréquence de 500 kHz, surpassant les conceptions précédentes. La deuxième partie de cette recherche comprend nos systèmes de transfert d’énergie sans fil proposé pour les applications optogénétiques. L’optogénétique est la combinaison de la méthode génétique et optique d’excitation, d’enregistrement et de contrôle des neurones biologiques. Ce système combine plusieurs technologies telles que les MEMS et la microélectronique pour collecter et transmettre les signaux neuronaux et activer un stimulateur optique via une liaison sans fil. Puisque les stimulateurs optiques consomment plus de puissance que les stimulateurs électriques, l’interface utilise la transmission de puissance par induction en utilisant des moyens innovants au lieu de la batterie avec la petite capacité comme source d’énergie.Notre première contribution dans la deuxième partie fournit un système de cage domestique intelligent basé sur des barrettes multi-bobines superposées à travers un récepteur multicellulaire implantable mince de taille 1×1 cm2, implanté sous le cuir chevelu d’une souris de laboratoire, et unité de gestion de l’alimentation intégrée. Ce système inductif est conçu pour fournir jusqu’à 35,5 mW de puissance délivrée à un émetteur-récepteur full duplex de faible puissance entièrement intégré pour prendre en charge des implants neuronaux à haute densité et bidirectionnels. L’émetteur (TX) utilise une bande ultra-large à impulsions radio basée sur des approches de combinaison, et le récepteur (RX) utilise une topologie à bande étroite à incrémentation de 2,4 GHz. L’émetteur-récepteur proposé fournit un débit de données de liaison montante TX à 500 Mbits/s double et un débit de données de liaison descendante RX à 100 Mbits/s, et est entièrement intégré dans un processus CMOS TSMC de 0,18-mm d’une taille totale de 0,8 mm2 . La puissance peut être délivrée à partir d’un signal de porteuse de 13,56-MHz avec une efficacité globale de transfert de puissance supérieure à 5% sur une distance de séparation allant de 3 cm à 5 cm. Notre deuxième contribution dans les systèmes de collecte d’énergie porte sur la conception et la mise en oeuvre d’une cage domestique de transmission de puissance sans fil (WPT) pour une plate-forme de neurosciences entièrement sans fil afin de permettre des expériences optogénétiques ininterrompues avec des rongeurs de laboratoire vivants. La cage domestique WPT utilise un nouveau réseau hybride de transmetteurs de puissance (TX) et des résonateurs multi-bobines segmentés pour atteindre une efficacité de transmission de puissance élevée (PTE) et délivrer une puissance élevée sur des distances aussi élevées que 20 cm. Le récepteur de puissance à bobines multiples (RX) utilise une bobine RX d’un diamètre de 1 cm et une bobine de résonateur d’un diamètre de 1,5 cm. L’efficacité moyenne du transfert de puissance WPT est de 29, 4%, à une distance nominale de 7 cm, pour une fréquence porteuse de 13,56 MHz. Il a des PTE maximum et minimum de 50% et 12% le long de l’axe Z et peut délivrer une puissance constante de 74 mW pour alimenter le headstage neuronal miniature. En outre, un dispositif implantable intégré dans un processus CMOS TSMC de 0,18-mm a été conçu et introduit qui comprend 64 canaux d’enregistrement, 16 canaux de stimulation optique, capteur de température, émetteur-récepteur et unité de gestion de l’alimentation (PMU). Ce circuit est alimenté à l’intérieur de la cage du WPT à l’aide d’une bobine réceptrice d’un diamètre de 1,5 cm pour montrer les performances du circuit PMU. Deux tensions régulées de 1,8 V et 1 V fournissent 79 mW de puissance pour tout le système sur une puce. Notre dernière contribution est un système WPT insensible aux désalignements angulaires pour alimenter un headstage pour des applications optogénétiques qui a été précédemment proposé par le Laboratoire de Microsystèmes Biomédicaux (BioML-UL) à ULAVAL. Ce système est la version étendue de notre deuxième contribution aux systèmes de collecte d’énergie.Dans la version mise à jour, un récepteur de puissance multi-bobines utilise une bobine RX d’un diamètre de 1,0 cm et une nouvelle bobine de résonateur fendu d’un diamètre de 1,5 cm, qui résiste aux défauts d’alignement angulaires. Dans cette version qui utilise une cage d’animal plus petite que la dernière version, 4 résonateurs sont utilisés côté TX. De plus, grâce à la forme et à la position de la bobine de répéteur L3 du côté du récepteur, la liaison résonnante hybride présentée peut correctement alimenter la tête sans interruption causée par le désalignement angulaire dans toute la cage de la maison. Chaque 3 tours du répéteur RX a été enveloppé avec un diamètre de 1,5 cm, sous différents angles par rapport à la bobine réceptrice. Les résultats de mesure montrent un PTE maximum et minimum de 53 % et 15 %. La méthode proposée peut fournir une puissance constante de 82 mW pour alimenter le petit headstage neural pour les applications optogénétiques. De plus, dans cette version, la performance du système est démontrée dans une expérience in-vivo avec une souris ChR2 en mouvement libre qui est la première expérience optogénétique sans fil et sans batterie rapportée avec enregistrement électrophysiologique simultané et stimulation optogénétique. L’activité électrophysiologique a été enregistrée après une stimulation optogénétique dans le Cortex Cingulaire Antérieur (CAC) de la souris.Our first contribution in the second part provides a smart home-cage system based on overlapped multi-coil arrays through a thin implantable multi-coil receiver of 1×1 cm2 of size, implantable bellow the scalp of a laboratory mouse, and integrated power management circuits. This inductive system is designed to deliver up to 35.5 mW of power delivered to a fully-integrated, low-power full-duplex transceiver to support high-density and bidirectional neural implants. The transmitter (TX) uses impulse radio ultra-wideband based on an edge combining approach, and the receiver (RX) uses a 2.4- GHz on-off keying narrow band topology. The proposed transceiver provides dual-band 500-Mbps TX uplink data rate and 100-Mbps RX downlink data rate, and it is fully integrated into 0.18-mm TSMC CMOS process within a total size of 0.8 mm2. The power can be delivered from a 13.56-MHz carrier signal with an overall power transfer efficiency above 5% across a separation distance ranging from 3 cm to 5 cm. Our second contribution in power-harvesting systems deals with designing and implementation of a WPT home-cage for a fully wireless neuroscience platform for enabling uninterrupted optogenetic experiments with live laboratory rodents. The WPT home-cage uses a new hybrid parallel power transmitter (TX) coil array and segmented multi-coil resonators to achieve high power transmission efficiency (PTE) and deliver high power across distances as high as 20 cm. The multi-coil power receiver (RX) uses an RX coil with a diameter of 1 cm and a resonator coil with a diameter of 1.5 cm. The WPT home-cage average power transfer efficiency is 29.4%, at a nominal distance of 7 cm, for a power carrier frequency of 13.56-MHz. It has maximum and minimum PTE of 50% and 12% along the Z axis and can deliver a constant power of 74 mW to supply the miniature neural headstage. Also, an implantable device integrated into a 0.18-mm TSMC CMOS process has been designed and introduced which includes 64 recording channels, 16 optical stimulation channels, temperature sensor, transceiver, and power management unit (PMU). This circuit powered up inside the WPT home-cage using receiver coil with a diameter of 1.5 cm to show the performance of the PMU circuit. Two regulated voltages of 1.8 V and 1 V provide 79 mW of power for all the system on a chip. Our last contribution is an angular misalignment insensitive WPT system to power up a headstage which has been previously proposed by the Biomedical Microsystems Laboratory (BioML-UL) at ULAVAL for optogenetic applications. This system is the extended version of our second contribution in power-harvesting systems. In the updated version a multi-coil power receiver uses an RX coil with a diameter of 1.0 cm and a new split resonator coil with a diameter of 1.5 cm, which is robust against angular misalignment. In this version which is using a smaller animal home-cage than the last version, 4 resonators are used on the TX side. Also, thanks to the shape and position of the repeater coil of L3 on the receiver side, the presented hybrid resonant link can properly power up the headstage without interruption caused by the angular misalignment all over the home-cage. Each 3 turns of the RX repeater has been wrapped up with a diameter of 1.5 cm, in different angles compared to the receiver coil. Measurement results show a maximum and minimum PTE of 53 % and 15 %. The proposed method can deliver a constant power of 82 mW to supply the small neural headstage for the optogenetic applications. Additionally, in this version, the performance of the system is demonstrated within an in-vivo experiment with a freely moving ChR2 mouse which is the first fully wireless and batteryless optogenetic experiment reported with simultaneous electrophysiological recording and optogenetic stimulation. Electrophysiological activity was recorded after delivering optogenetic stimulation in the Anterior Cingulate Cortex (ACC) of the mouse.Currently, there is a high demand for Headstage and implantable integrated microsystems to study the brain activity of freely moving laboratory mice. Such devices can interface with the central nervous system in both electrical and optical paradigms for stimulating and monitoring neural circuits, which is critical to discover new drugs and therapies against neurological disorders like epilepsy, depression, and Parkinson’s disease. Since the implantable systems cannot use a battery with a large capacity as a primary source of energy in long-term experiments, the power consumption of the implantable device is one of the leading challenges of these designs. The first part of this research includes our proposed solution for decreasing the power consumption of the implantable microcircuits. We propose a novel level shifter circuit which converting subthreshold signal levels to super-threshold signal levels at high-speed using ultra low power and a small silicon area, making it well-suited for low-power applications such as wireless sensor networks and implantable medical devices. The proposed circuit introduces a new voltage level shifter topology employing a level-shifting capacitor to increase the range of conversion voltages, while significantly reducing the conversion delay. The proposed circuit achieves a shorter propagation delay and a smaller silicon area for a given operating frequency and power consumption compared to other circuit solutions. Measurement results are presented for the proposed circuit fabricated in a 0.18-mm TSMC CMOS process. The presented circuit can convert a wide range of the input voltages from 330 mV to 1.8 V, and operate over a frequency range of 100-Hz to 100-MHz. It has a propagation delay of 29 ns, and power consumption of 61.5 nW for input signals 0.4 V, at a frequency of 500-kHz, outperforming previous designs. The second part of this research includes our proposed wireless power transfer systems for optogenetic applications. Optogenetics is the combination of the genetic and optical method of excitation, recording, and control of the biological neurons. This system combines multiple technologies such as MEMS and microelectronics to collect and transmit the neuronal signals and to activate an optical stimulator through a wireless link. Since optical stimulators consume more power than electrical stimulators, the interface employs induction power transmission using innovative means instead of the battery with the small capacity as a power source

CMOS Design of Reconfigurable SoC Systems for Impedance Sensor Devices

La rápida evolución en el campo de los sensores inteligentes, junto con los avances en las tecnologías de la computación y la comunicación, está revolucionando la forma en que recopilamos y analizamos datos del mundo físico para tomar decisiones, facilitando nuevas soluciones que desempeñan tareas que antes eran inconcebibles de lograr.La inclusión en un mismo dado de silicio de todos los elementos necesarios para un proceso de monitorización y actuación ha sido posible gracias a los avances en micro (y nano) electrónica. Al mismo tiempo, la evolución de las tecnologías de procesamiento y micromecanizado de superficies de silicio y otros materiales complementarios ha dado lugar al desarrollo de sensores integrados compatibles con CMOS, lo que permite la implementación de matrices de sensores de alta densidad. Así, la combinación de un sistema de adquisición basado en sensores on-Chip, junto con un microprocesador como núcleo digital donde se puede ejecutar la digitalización de señales, el procesamiento y la comunicación de datos proporciona características adicionales como reducción del coste, compacidad, portabilidad, alimentación por batería, facilidad de uso e intercambio inteligente de datos, aumentando su potencial número de aplicaciones.Esta tesis pretende profundizar en el diseño de un sistema portátil de medición de espectroscopía de impedancia de baja potencia operado por batería, basado en tecnologías microelectrónicas CMOS, que pueda integrarse con el sensor, proporcionando una implementación paralelizable sin incrementar significativamente el tamaño o el consumo, pero manteniendo las principales características de fiabilidad y sensibilidad de un instrumento de laboratorio. Esto requiere el diseño tanto de la etapa de gestión de la energía como de las diferentes celdas que conforman la interfaz, que habrán de satisfacer los requisitos de un alto rendimiento a la par que las exigentes restricciones de tamaño mínimo y bajo consumo requeridas en la monitorización portátil, características que son aún más críticas al considerar la tendencia actual hacia matrices de sensores.A nivel de celdas, se proponen diferentes circuitos en un proceso CMOS de 180 nm: un regulador de baja caída de voltaje como unidad de gestión de energía, que proporciona una alimentación de 1.8 V estable, de bajo ruido, precisa e independiente de la carga para todo el sistema; amplificadores de instrumentación con una aproximación completamente diferencial, que incluyen una etapa de entrada de voltaje/corriente configurable, ganancia programable y ancho de banda ajustable, tanto en la frecuencia de corte baja como alta; un multiplicador para conformar la demodulación dual, que está embebido en el amplificador para optimizar consumo y área; y filtros pasa baja totalmente integrados, que actúan como extractores de magnitud de DC, con frecuencias de corte ajustables desde sub-Hz hasta cientos de Hz.<br /

0.6-V-VIN 7.0-nA-IQ 0.75-mA-IL CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies

A capacitor-less (CL) low-dropout (LDO) regulator suitable to be incorporated in an on-chip system with low-voltage micro-energy-harvested supply, is proposed in this contribution. The differential input stage of the error amplifier includes bulk-driven MOS transistors, thus providing the LDO with an output voltage range that extends from the negative rail up to a level very close to the input voltage without the need of using a resistive feedback network. The circuit parameters relying on the feedback factor, , are maximized thanks to the use of a unitary value for this parameter. The CL-LDO has been designed and fabricated in standard 180-nm CMOS technology and optimized to operate with an input voltage equal to 0.6 V and a reference level of 0.5 V. The experimental characterization of the fabricated prototypes shows that, under these operating conditions, the LDO is able to deliver a load current above 0.75 mA with a total quiescent current of only 7.0 nA. Furthermore, the proposed voltage regulator is able to operate from input voltages as low as 0.4 V, delivering in this case a maximum load current of 30 μA.RTI2018- 095994-B-I00 ED431G-2019/04 GRC2021/48 IB18079S