952 research outputs found

    Texture in thin film silicides and germanides : a review

    Get PDF
    Silicides and germanides are compounds consisting of a metal and silicon or germanium. In the microelectronics industry, silicides are the material of choice for contacting silicon based devices (over the years, CoSi2, C54-TiSi2, and NiSi have been adopted), while germanides are considered as a top candidate for contacting future germanium based electronics. Since also strain engineering through the use of Si1-xGex in the source/drain/gate regions of MOSFET devices is an important technique for improving device characteristics in modern Si-based microelectronics industry, a profound understanding of the formation of silicide/germanide contacts to silicon and germanium is of utmost importance. The crystallographic texture of these films, which is defined as the statistical distribution of the orientation of the grains in the film, has been the subject of scientific studies since the 1970s. Different types of texture like epitaxy, axiotaxy, fiber, or combinations thereof have been observed in such films. In recent years, it has become increasingly clear that film texture can have a profound influence on the formation and stability of silicide/germanide contacts, as it controls the type and orientation of grain boundaries (affecting diffusion and agglomeration) and the interface energy (affecting nucleation during the solid-state reaction). Furthermore, the texture also has an impact on the electrical characteristics of the contact, as the orientation and size of individual grains influences functional properties such as contact resistance and sheet resistance and will induce local variations in strain and Schottky barrier height. This review aims to give a comprehensive overview of the scientific work that has been published in the field of texture studies on thin film silicide/germanide contacts. Published by AIP Publishing

    Optimization of materials for microelectronics industry by in-situ coupling of electrical and structural characterization techniques

    Get PDF
    In microelectronics industry, one way to improve MOSFET performances is to reduce the gate “propagation” delay, i.e. the time between input and output signal in a transistor, by reducing the contact resistance between the Source/Gate/Drain and the metallic layer. These contacts are obtained by solid-state reaction of a metallic film with the Si substrate. The thermodynamics involved in these reactions are complex, especially for thin films. Thus, for a better understanding of these reactions driving forces, it is important to have a tool that enables the correlation of structural and electrical (here sheet resistance) properties during the formation of these contacts. The aim of this study is to build a setup that allows the optimization of materials for microelectronics industry by in-situ coupling of electrical (4 points probe method for sheet resistance measurement) and structural (XRD/XRR/Raman spectroscopy) characterization techniques and then to apply and validate the performances, capabilities, limitations of our setup with different materials… The setup consists on a heating stage that plays the role of a sample holder in a diffractometer/spectrometer while 4 tungsten based points’ probes are positioned on the sample surface and measures its sheet resistance. Both the Temperature Control Unit (TCU) and the SourceMeter are remotely controlled using a python script that reads and writes the TCU temperature and Ramp Rate (RR), and sources current and senses voltage using the SourceMeter. Various materials that are used in STMicroelectronics high technology chips were characterized using this setup e.g. Ni(Pt), Vanadium, ITO… with a high focus on silicides. This study aims to correlate the evolution of materials electrical and structural properties driven by physical mechanisms investigated in literature review. First, Ni(Pt) is studied. The in-situ coupling of XRD and sheet resistance measurement showed that the sheet resistance suddenly decreases at ~265°C. It corresponds to the Ni to NiSi phase transition temperature. A Raman spectroscopy analysis performed on a sample that was annealed at this temperature showed also the formation of the Ni2Si phase, and an XRR analysis showed that this phase possibly nucleates as an interlayer in the Ni/Si interface instead of clusters inside the Ni matrix. The Kissinger method, that estimates the activation energy of the Ni to NiSi phase transition using constant ramp rate annealing, was, for the first time, enabled in our laboratory. Measurements were performed in air atmosphere because a TiN capping layer was deposited to prevent thermal oxidation issues. The effect of alloying, i.e. metal incorporation in small quantities in the nickel layer, e.g. 10%at Pt, on sheet resistance evolution were investigated. It was shown, using an isothermal annealing, slightly above the phase transition temperature, that the amount of Pt in the Ni remaining layer increases. Second, Vanadium thin film was also investigated. This material is very sensitive to oxidation. We showed that even with a TiN capping layer, undesired oxidation issues were observed. To check that point, we tried on another sheet resistance measurement setup (not compatible with XRD or Raman spectroscopy) but working in vacuum/inert gas heating chamber. We can conclude from this study that a specific setup/furnace should be used for further studies, e.g. the effect of various inert gas annealing on microstructure

    Formation and texture of thin film silicides

    Get PDF

    Development of nickel silicide for integrated circuit technology

    Get PDF
    Continuous advancements in devices, materials and processes have resulted in integrated circuits with smaller device dimensions, higher functionality and higher speed. The complementary metal oxide semiconductor (CMOS) technology has been the engine of this success. The MOS transistor is shrinking following the Moore\u27s Law over the last several decades. As the device dimensions are approaching nanometer regime, parasitic resistance, capacitance and inductance are beginning to influence the performance significantly. Self-aligned silicide process was developed in mid eighties that allowed reduction of gate and contact resistance by using metal silicides as low resistivity materials. The process also enabled higher packing density. Many silicides have been extensively studied and Titanium silicide (TiSi2) and Cobalt silicide (CoSi2) have been implemented into modern devices. With devices shrinking, TiSi2 and CoSi2 are finding serious limitations of linewidth effect and excessive silicon consumption. One attractive alternative is nickel monosilicide (NiSi). NiSi has comparable resistivity as traditional silicides yet consumes less silicon during formation, no line width dependence, single thermal treatment, and relatively planar silicide-silicon interface. However, implementation of NiSi into future generation devices has been delayed by limited knowledge of its thermal instability. In the study presented in this thesis, silicidation of nickel metal has been investigated. Silicidation has been carried out on doped and non-doped polycrystalline and crystalline silicon regions. Rapid thermal process was used for the silicidation of sputtered nickel metal into nickel silicide. The electrical and material properties of nickel silicide were characterized, and correlations between electrical data, material properties, and silicidation conditions have been made. Electrical resistivity was calculated through the uses of sheet resistivity measurements using the four-point probe technique and the grooving technique. The grooving technique was used to measure the silicide\u27s thickness necessary for electrical resistivity calculation. The silicide surface topography and phase composition were analyzed using the AFM and XRD technique respectively. Furthermore, RBS and SIMS analysis were done to complement the material properties study of nickel silicide. The experimental result showed strong correlation between nickel silicide\u27s electrical resistivity with surface topography and phase composition. A multiple phases mixture composition was observed in crystalline silicon and polysilicon regions at temperature less than 573°C and 695°C respectively. It is concluded that the most optimal silicidation condition for obtaining the single-phase nickel monosilicide was at 695°c for 60 sec. Such condition yield a NiSi film with an electrical resistivity of ~1.6 x 10-5 (Si), 3.3 x 10-5 Ω-cm (Poly). The most optimal silicidation for obtaining the lowest multi-phase mixture silicide was found to be at 500°C for 20sec or more. Such condition yielded a NixSi + NiSi phase mixture with an electrical resistivity of ~ 1.6 x 10-5 (Si), 2.5 x 10-5 Ω-cm (Poly)

    Phase formation and size effects in nanoscale silicide layers for the sub-100 nm microprocessor technology

    Get PDF
    Silizide spielen ein wesentliche Rolle in den technologisch fortschrittlichsten CMOS Bauteilen. Sie finden Verwendung als Kontaktmaterial auf den Aktivgebieten und dem Silizium Gatter von Transistoren. Diese Arbeit beschäftigt sich mit den Systemen: Co-Si, Co-Ni-Si und Ni-Si. Sowohl in situ Hochtemperatur-SR-XRD Experimente als auch CBED wurden zur Phasenidentifikation herangezogen. AES erlaubte es, Elementverteilungen in Schichtstapeln zu bestimmen. Für Studien über Agglomerationserscheinungen wurde REM eingesetzt. TEM und analytisches TEM trugen nicht nur zu Einblicken in Schichtstrukturen und Kornformen bei, sondern lieferten auch Daten zu Elementverteilungen in Silizidschichten. Diese Dissertation gliedert sich in zwei Hauptteile. Der erste Teil beschäftigt sich mit den Phasenbildungsabfolgen und den Phasenbildungs- und Umwandlungstemperaturen in nanoskaligen dünnen Schichten. Als Trägermaterial wurden einkristalline und polykristalline Siliziumsubstrate verwendet. Der Einfluß verschiedener Dotierungen im Vergleich zu undotierten Substraten sowie die Beeinflussung der Silizidierung durch eine Deckschicht wurden untersucht. Im zweiten Teil waren Größeneffekte verschiedener Schichtdicken und Agglomerationserscheinungen Gegenstand von Untersuchungen. Unterschiede bei der Silizidierung in Zusammenhang mit unterschiedlichen Schichtdicken wurden bestimmt. Darüberhinaus wurde eine ternäre CoTiSi Phase gefunden und identifiziert. Außerdem konnte die stark eingeschränkte Mischbarkeit der Monosilizide CoSi und NiSi gezeigt werden. Der thermische Ausdehnungskoeffizient von NiSi im Temperaturbereich 400?700°C und sein nicht-lineares Verhalten wurden bestimmt.Silicides are an essential part of state-of-the-art CMOS devices. They are used as contact material on the active regions as well as on the Si gate of a transistor. In this work, investigations were performed in the systems Co-Si, Co-Ni-Si, and Ni-Si. In situ high temperature SR-XRD and CBED techniques were used for phase identification. AES enabled the determination of elemental concentrations in layer stacks. SEM was applied to agglomeration studies. TEM imaging and analytical TEM provided insights into layer structures, grain morphology as well as information about the distribution of chemical elements within silicide layers. This thesis is divided into two main parts. The first part deals with the phase formation sequences and the phase formation and conversion temperatures in nanoscale thin films on either single crystal or polycrystalline Si substrates. The effect of different types of dopants vs. no doping and the impact of a capping layer on the phase formation and conversion temperatures were studied. In the second part, size effects and agglomeration of thin silicide films were investigated. The effect of different layer thicknesses on the silicidation process was studied. Additionally, the degree of agglomeration of silicide films was calculated. Furthermore, the ternary CoTiSi phase was found and identified as well as the severely limited miscibility of the monosilicides CoSi and NiSi could be shown. The CTE of NiSi between 400?700 ±C and its non-linear behavior was determined

    A new metallization technology for solar cells application

    Get PDF
    This Ph.D. thesis is focused on the development and optimization of front and rear side metallization of industrial silicon solar cells. The commonly adopted screen-printed silver metallization has several well-known issues, such as low contact resistance, moderate bulk conductivity and high cost. The approach of this work allows complete silver replacement, both on the front and the rear sides. The development of such a new technology is divided into several parts, each resulting in appropriate feedback in terms of solar cell operation parameters. A detailed investigation of the aluminum-silicon interdiffusion that occurs during the firing process of screen-printed aluminum layer usually deposited onto the rear of solar cells is reported. This process is very important because it affects solar cell operation and performance through back-surface field passivation. In this study different screen-printing aluminum pastes, differing one from each other in aluminum particle dimensions and glass frit composition, are evaluated in terms of their bulk resistivity, contact resistance to silicon, back surface field depth and solar cell performance. Finally, this study allowed to reveal certain dependences between pastes parameters and their effect on solar cells and to develop useful recommendations for better solar cell performance. In this work, a new metallization technology is based on an electroplating technique, which for a real industrial application, however, has some critical issues as throughput, floor space, quantity of liquid to manage and the necessity to use some masking technique, such as photolithography. These issues are strongly influencing the metallization technology cost, making it not economically convenient respect silver screen-printing technology. For this purpose, the proposed metallization technique is based on a novel dynamic liquid drop/meniscus (DLD/DLM) technique able to solve both issues. In this work DLD/DLM technique is studied for possible application in a new rear side metallization technology for solar cells, allowing localized formation of solder pads without any use of photolithography, limiting the cost of the process mainly to the cost of materials, such as nickel and tin, which are significantly cheaper than a silver counterpart that is currently adopted by the industry. The cost reduction is not a single advantage of the proposed technology. An efficiency improvement of up to 0.5 %abs is obtained due to a better back-surface field conditions. The development of a new front side metallization is based on a new approach which introduces a layer of mesoporous silicon helpful for further creation of nickel-copper electrical contacts to the emitter region of a solar cell. Process conditions of mesoporous silicon formation and further electroplating steps are studied and optimized in terms of contact resistance and adhesion of such a contacts, in order to guarantee a beneficial influence for solar cells fabricated with the new metallization approach. As for combination of both front and rear side metallization technologies, together, they result in complete silver removal from a metallization technology of a solar cell with a feasible efficiency enhancement of up to 1 %abs

    Synthesis of silicide nanomaterials using chemical vapour deposition method

    Get PDF
    Recent research has evidenced that nanotechnology may bring about a material revolution which sweeps through different scientific fields and leads to dramatic changes in the use of natural resources and our everyday life. Compared to their bulk counterparts, the nanomaterials may exhibit significantly improved physical properties by shrinking their size to nanometer scale. Metal silicide are distinguished by their features of combining advantages of both metals and semiconductors which promises superior performance various fields. Despite the progress in the synthesis methods of nanomaterials, it still remains a big challenge in controlled synthesis of 1D silicide nanostructures due to the difficulties of well-controlled synthesis conditions. In this study, synthesis process of NiSix and CoSix with different morphologies using CVD method have been analysed and determined. Synthesis of different structures of NiSix on a number of substrates has been investigated. The mechanisms behind the growth of these nanostructures have been studied for better understanding of the synthesis of these silicides. The detailed characterization techniques such as SEM, TEM and XRD were used

    Marker studies of nickel silicide formation

    Get PDF
    Includes bibliographical references.Atomic diffusion during the solid state formation of thin films of nickel silicides (Ni2Si and NiSi) from nickel and amorphous silicon has been investigated using 31Si radioactive tracer and inert marker techniques. Samples were prepared by vacuum deposition of thin films of nickel and silicon, followed by thermal annealing to effect silicide growth. The radioactive tracer investigation of Ni2Si showed nickel to be the diffusing species during silicide growth. Sharply defined Ni2si* profiles of 100% radioactive concentration at the sample surface were - obtained. The results are compared with previous results in which the profiles were more spread out and of lower surface concentration. The radioactive tracer investigation of NiSi formation showed that nickel is also the diffusing species during second phase growth. The NiSi * layer was found to be of 100% concentration. Some spreading of the activity profile near the NiSi/NiSi* interface was observed. The results were consistent with previous 31Si tracer work on NiSi formation and also with the present Ni * 2Si results. The inert marker investigation used an ultra-thin (5-10 A) continuous layer of Mo or Ta to monitor atomic movement during silicide growth. The results confirmed nickel to be the diffusing species during the growth of both phases. These results are in excellent agreement with previous inert marker studies of nickel silicide growth
    • …
    corecore