On the Investigation of a Novel Dual-Control-Gate Floating Gate Transistor for VCO Applications

A new MOS device called Dual-Control Gate Floating Gate Transistor (DCG-FGT) is used as a building block in analog design. This device offers new approaches in circuit design and allows developing new functionalities through two operating modes: Threshold Voltage Adjustable Mode, where the DCG-FGT behaves like a MOS transistor with an electrically adjustable threshold voltage. Mixer Signal Mode where the DCG-FGT can mix two independent signals on its floating gate. This device is developed to be fully compliant with CMOS Non Volatile Memory (NVM) process. An electrical model of the DCG-FGT has been implemented in an electrical simulator to be available for analog design. A DCG-FGT based ring oscillator is studied in this paper

On the Investigation of a Novel Dual-Control-Gate Floating Gate Transistor for VCO Applications

A new MOS device called Dual-Control Gate Floating Gate Transistor (DCG-FGT) is used as a building block in analog design. This device offers new approaches in circuit design and allows developing new functionalities through two operating modes: Threshold Voltage Adjustable Mode, where the DCG-FGT behaves like a MOS transistor with an electrically adjustable threshold voltage. Mixer Signal Mode where the DCG-FGT can mix two independent signals on its floating gate. This device is developed to be fully compliant with CMOS Non Volatile Memory (NVM) process. An electrical model of the DCG-FGT has been implemented in an electrical simulator to be available for analog design. A DCG-FGT based ring oscillator is studied in this paper

ELECTRICAL CHARACTERIZATION, PHYSICS, MODELING AND RELIABILITY OF INNOVATIVE NON-VOLATILE MEMORIES

Enclosed in this thesis work it can be found the results of a three years long research activity performed during the XXIV-th cycle of the Ph.D. school in Engineering Science of the Università degli Studi di Ferrara. The topic of this work is concerned about the electrical characterization, physics, modeling and reliability of innovative non-volatile memories, addressing most of the proposed alternative to the floating-gate based memories which currently are facing a technology dead end. Throughout the chapters of this thesis it will be provided a detailed characterization of the envisioned replacements for the common NOR and NAND Flash technologies into the near future embedded and MPSoCs (Multi Processing System on Chip) systems. In Chapter 1 it will be introduced the non-volatile memory technology with direct reference on nowadays Flash mainstream, providing indications and comments on why the system designers should be forced to change the approach to new memory concepts. In Chapter 2 it will be presented one of the most studied post-floating gate memory technology for MPSoCs: the Phase Change Memory. The results of an extensive electrical characterization performed on these devices led to important discoveries such as the kinematics of the erase operation and potential reliability threats in memory operations. A modeling framework has been developed to support the experimental results and to validate them on projected scaled technology. In Chapter 3 an embedded memory for automotive environment will be shown: the SimpleEE p-channel memory. The characterization of this memory proven the technology robustness providing at the same time new insights on the erratic bits phenomenon largely studied on NOR and NAND counterparts. Chapter 4 will show the research studies performed on a memory device based on the Nano-MEMS concept. This particular memory generation proves to be integrated in very harsh environment such as military applications, geothermal and space avionics. A detailed study on the physical principles underlying this memory will be presented. In Chapter 5 a successor of the standard NAND Flash will be analyzed: the Charge Trapping NAND. This kind of memory shares the same principles of the traditional floating gate technology except for the storage medium which now has been substituted by a discrete nature storage (i.e. silicon nitride traps). The conclusions and the results summary for each memory technology will be provided in Chapter 6. Finally, on Appendix A it will be shown the results of a recently started research activity on the high level reliability memory management exploiting the results of the studies for Phase Change Memories

Multiple-valued floating-gate-MOS pass logic and its application to logic-in-memory VLSI

科研費報告書収録論文(課題番号:09558027・基盤研究(B)(2)・H9～H12/研究代表者:羽生, 貴弘/1トランジスタセル多値連想メモリの試作とその応用

Modelización numérica de la pérdida de carga inducida por radiación en celdas CMOS de puerta flotante

Mediante un modelo numérico desarrollado recientemente y basado en principios físicos, se estudia la respuesta a la radiación de celdas de compuerta flotante programadas/borradas. El rol que juega la captura de carga en los óxidos en el desplazamiento total de la tensión umbral con la dosis es debidamente evaluado a través de la variación de la tasa de captura de los huecos generados por radiación. Se considera un modelo analítico simplificado y se discuten sus limitaciones.The radiation response of programmed/erased floating gate cells is studied by numerical simulations through a recently developed physics-based numerical model. The role played by oxide trapped charge in the overall threshold voltage shift with dose is properly evaluated by varying the capture rate of radiation-generated holes. A simplified analytical model is considered, and its limitations are discussed.Fil: Sambuco Salomone, Lucas Ignacio. Universidad de Buenos Aires; ArgentinaFil: García Inza, Mariano Andrés. Consejo Nacional de Investigaciones Científicas y Técnicas. Oficina de Coordinación Administrativa Houssay. Instituto de Tecnologías y Ciencias de la Ingeniería "Hilario Fernández Long". Universidad de Buenos Aires. Facultad de Ingeniería. Instituto de Tecnologías y Ciencias de la Ingeniería "Hilario Fernández Long"; ArgentinaFil: Carbonetto, Sebastián Horacio. Consejo Nacional de Investigaciones Científicas y Técnicas. Oficina de Coordinación Administrativa Houssay. Instituto de Tecnologías y Ciencias de la Ingeniería "Hilario Fernández Long". Universidad de Buenos Aires. Facultad de Ingeniería. Instituto de Tecnologías y Ciencias de la Ingeniería "Hilario Fernández Long"; ArgentinaFil: Faigon, Adrián Néstor. Consejo Nacional de Investigaciones Científicas y Técnicas. Oficina de Coordinación Administrativa Houssay. Instituto de Tecnologías y Ciencias de la Ingeniería "Hilario Fernández Long". Universidad de Buenos Aires. Facultad de Ingeniería. Instituto de Tecnologías y Ciencias de la Ingeniería "Hilario Fernández Long"; Argentin