1,606 research outputs found

    ATMP: An Adaptive Tolerance-based Mixed-criticality Protocol for Multi-core Systems

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    ยฉ 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted ncomponent of this work in other works.The challenge of mixed-criticality scheduling is to keep tasks of higher criticality running in case of resource shortages caused by faults. Traditionally, mixedcriticality scheduling has focused on methods to handle faults where tasks overrun their optimistic worst-case execution time (WCET) estimate. In this paper we present the Adaptive Tolerance based Mixed-criticality Protocol (ATMP), which generalises the concept of mixed-criticality scheduling to handle also faults of other nature, like failure of cores in a multi-core system. ATMP is an adaptation method triggered by resource shortage at runtime. The first step of ATMP is to re-partition the task to the available cores and the second step is to optimise the utility at each core using the tolerance-based real-time computing model (TRTCM). The evaluation shows that the utility optimisation of ATMP can achieve a smoother degradation of service compared to just abandoning tasks

    FANTOM: Fault Tolerant Task-Drop Aware Scheduling for Mixed-Criticality Systems

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    Mixed-Criticality (MC) systems have emerged as an effective solution in various industries, where multiple tasks with various real-time and safety requirements (different levels of criticality) are integrated onto a common hardware platform. In these systems, a fault may occur due to different reasons, e.g., hardware defects, software errors or the arrival of unexpected events. In order to tolerate faults in MC systems, the re-execution technique is typically employed, which may lead to overrun of high-criticality tasks (HCTs), which necessitates the drop of low-criticality tasks (LCTs) or degrading their quality. However, frequent drops or relatively long execution times of LCTs (especially mission-critical tasks) are not always desirable and it may impose a negative impact on the performance, or the functionality of MC systems. In this regard, this article proposes a realistic MC task model and develops a design-time task-drop aware schedulability analysis based on the Earliest Deadline First with Virtual Deadline (EDF-VD) algorithm. According to this analysis and the proposed scheduling policy based on the new MC task model, in the high-criticality (HI) mode, when an HCT overruns and the system switches to the HI mode, the number of drops per LCT is prohibited from passing a predefined threshold. In addition, to guarantee the real-time constraints and safety requirements of MC tasks in the presence of faults (assuming transient faults in this article), a corresponding scheduling mechanism has been developed. According to the obtained results from an extensive set of simulations, which have been validated through a realistic avionic application, the proposed method improves the acceptance ratio by up to 43.9% compared to state-of-the-art

    Software Fault Tolerance in Real-Time Systems: Identifying the Future Research Questions

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    Tolerating hardware faults in modern architectures is becoming a prominent problem due to the miniaturization of the hardware components, their increasing complexity, and the necessity to reduce the costs. Software-Implemented Hardware Fault Tolerance approaches have been developed to improve the system dependability to hardware faults without resorting to custom hardware solutions. However, these come at the expense of making the satisfaction of the timing constraints of the applications/activities harder from a scheduling standpoint. This paper surveys the current state of the art of fault tolerance approaches when used in the context real-time systems, identifying the main challenges and the cross-links between these two topics. We propose a joint scheduling-failure analysis model that highlights the formal interactions among software fault tolerance mechanisms and timing properties. This model allows us to present and discuss many open research questions with the final aim to spur the future research activities

    A Survey of Fault-Tolerance Techniques for Embedded Systems from the Perspective of Power, Energy, and Thermal Issues

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    The relentless technology scaling has provided a significant increase in processor performance, but on the other hand, it has led to adverse impacts on system reliability. In particular, technology scaling increases the processor susceptibility to radiation-induced transient faults. Moreover, technology scaling with the discontinuation of Dennard scaling increases the power densities, thereby temperatures, on the chip. High temperature, in turn, accelerates transistor aging mechanisms, which may ultimately lead to permanent faults on the chip. To assure a reliable system operation, despite these potential reliability concerns, fault-tolerance techniques have emerged. Specifically, fault-tolerance techniques employ some kind of redundancies to satisfy specific reliability requirements. However, the integration of fault-tolerance techniques into real-time embedded systems complicates preserving timing constraints. As a remedy, many task mapping/scheduling policies have been proposed to consider the integration of fault-tolerance techniques and enforce both timing and reliability guarantees for real-time embedded systems. More advanced techniques aim additionally at minimizing power and energy while at the same time satisfying timing and reliability constraints. Recently, some scheduling techniques have started to tackle a new challenge, which is the temperature increase induced by employing fault-tolerance techniques. These emerging techniques aim at satisfying temperature constraints besides timing and reliability constraints. This paper provides an in-depth survey of the emerging research efforts that exploit fault-tolerance techniques while considering timing, power/energy, and temperature from the real-time embedded systemsโ€™ design perspective. In particular, the task mapping/scheduling policies for fault-tolerance real-time embedded systems are reviewed and classified according to their considered goals and constraints. Moreover, the employed fault-tolerance techniques, application models, and hardware models are considered as additional dimensions of the presented classification. Lastly, this survey gives deep insights into the main achievements and shortcomings of the existing approaches and highlights the most promising ones

    CSP channels for CAN-bus connected embedded control systems

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    Closed loop control system typically contains multitude of sensors and actuators operated simultaneously. So they are parallel and distributed in its essence. But when mapping this parallelism to software, lot of obstacles concerning multithreading communication and synchronization issues arise. To overcome this problem, the CT kernel/library based on CSP algebra has been developed. This project (TES.5410) is about developing communication extension to the CT library to make it applicable in distributed systems. Since the library is tailored for control systems, properties and requirements of control systems are taken into special consideration. Applicability of existing middleware solutions is examined. A comparison of applicable fieldbus protocols is done in order to determine most suitable ones and CAN fieldbus is chosen to be first fieldbus used. Brief overview of CSP and existing CSP based libraries is given. Middleware architecture is proposed along with few novel ideas

    A Survey of Research into Mixed Criticality Systems

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    This survey covers research into mixed criticality systems that has been published since Vestalโ€™s seminal paper in 2007, up until the end of 2016. The survey is organised along the lines of the major research areas within this topic. These include single processor analysis (including fixed priority and EDF scheduling, shared resources and static and synchronous scheduling), multiprocessor analysis, realistic models, and systems issues. The survey also explores the relationship between research into mixed criticality systems and other topics such as hard and soft time constraints, fault tolerant scheduling, hierarchical scheduling, cyber physical systems, probabilistic real-time systems, and industrial safety standards

    ์ตœ์‹  ECU๋ณด๋“œ๋ฅผ ํ™œ์šฉํ•˜์—ฌ ์†Œํ”„ํŠธ์—๋Ÿฌ๋“ค์„ ์‹ค์‹œ๊ฐ„ ๋ณต๊ตฌํ•˜๋Š” ๊ธฐ๋ฒ•

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    ํ•™์œ„๋…ผ๋ฌธ (์„์‚ฌ) -- ์„œ์šธ๋Œ€ํ•™๊ต ๋Œ€ํ•™์› : ๊ณต๊ณผ๋Œ€ํ•™ ์ปดํ“จํ„ฐ๊ณตํ•™๋ถ€, 2020. 8. ์ด์ฐฝ๊ฑด.This dissertation presents the fault-tolerant real-time scheduling using dynamic mode switch support of modern ECU hardware. This dissertation first describes the optimal capacity of the Periodic Resource which contains harmonic periodic task set using the exact time supply function.We show that the optimal capacity can be represented as sum of the each individual utilization of the task in the harmonic periodic task set for both normal state(i.e. no faults) and faulty state. Then, this dissertation proposes non-critical task overlapping technique by only using the idle time intervals of the Periodic Resource in order to overlap the non-critical tasks which ensures no additional capacity increase. Finally, this dissertation proposes the basic form of the Periodic Resources in order to efficiently use the dynamic mode switch support. Next, we also proposes the bin-packing heuristic algorithm that considers both making sub-taskset as a one Periodic Resource and Periodic Resource wide bin-packing which has the pseudo-polynomial time complexity. Experimental results show that the proposed algorithm performs better than the traditional partitioned fixed-priority scheduling approach and partitioned mixed-criticality scheduling approach. Also, the achievement is made up to 18% in terms of the total needed cores compared to traditional partitioned fixed-priority approach for making the given input task set schedulable.๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ํšจ์œจ์ ์ธ ์žฌ๊ตฌ์„ฑ๊ฐ€๋Šฅ ์‹œ์Šคํ…œ ์‚ฌ์šฉ์„ ์œ„ํ•œ ๊ณ„์ธต๊ธฐ๋ฐ˜ ์‹ค์‹œ๊ฐ„ ๊ฒฐํ•จ ๊ฐ๋‚ด ์Šค์ผ€์ค„๋ง ๊ธฐ๋ฒ•์„ ์ œ์•ˆํ•œ๋‹ค. ๋ณธ ์—ฐ๊ตฌ๋Š” ์ฃผ๊ธฐ ์ž์› ๋ชจ๋ธ์„ ๊ธฐ๋ฐ˜์œผ๋กœ, ์ตœ์  ์ฃผ๊ธฐ ์ž์› ์„œ๋ฒ„์˜ ์šฉ๋Ÿ‰์„ ์ฃผ๊ธฐ ์ž์› ๋ชจ๋ธ์ด ๊ฐ€์ง€๋Š” ์‹ค์‹œ๊ฐ„ ์ฃผ๊ธฐ ํƒœ์Šคํฌ ์…‹์˜ ์œ ํ‹ธ๋ผ์ด์ œ์ด์…˜์˜ ํ•ฉ์œผ๋กœ ์ œ์‹œํ•œ๋‹ค. ๋ณธ ๋…ผ๋ฌธ์€ ํ•ด๋‹น ์ตœ์  ์„œ๋ฒ„ ์šฉ๋Ÿ‰์„ ์‹œ์Šคํ…œ์ด ์ •์ƒ ๋™์ž‘ํ• ๋•Œ์™€ ์˜ค๋™์ž‘ ํ• ๋•Œ ๋ชจ๋‘์— ๋Œ€ํ•ด์„œ ์ œ์‹œํ•œ๋‹ค. ๋‹ค์Œ์œผ๋กœ, ๋น„์ค‘์š” ํƒœ์Šคํฌ ์…‹๋“ค์„ ์ค‘์š” ์ฃผ๊ธฐ ์ž์› ์„œ๋ฒ„์˜ ์—ฌ๋ถ„ ๊ณต๋ฐฑ ์‹œ๊ฐ„์„ ํ™œ์šฉํ•ด ์„œ๋ฒ„ ์šฉ๋Ÿ‰์˜ ์ฆ๊ฐ€ ์—†์ด ๋น„์ค‘์š” ํƒœ์Šคํฌ๋ฅผ ์ค‘์š” ์ฃผ๊ธฐ ์ž์› ์„œ๋ฒ„์— ํ• ๋‹นํ•˜๋Š” ๋ฐฉ๋ฒ•๋ก ์„ ์ œ์‹œํ•œ๋‹ค. ๋งˆ์ง€๋ง‰์œผ๋กœ ๋ณธ ๋…ผ๋ฌธ์€ ์ฃผ๊ธฐ ์ž์› ์„œ๋ฒ„ ๋‹จ์œ„์˜ ํŒŒํ‹ฐ์…˜ ๊ธฐ๋ฒ•๊ณผ ์ฃผ๊ธฐ ํƒœ์Šคํฌ๋ฅผ ํ•˜๋‚˜์˜ ์ฃผ๊ธฐ ์ž์› ์„œ๋ฒ„๋กœ ๋งŒ๋“œ๋Š” ๋นˆํŒจํ‚น ํœด๋ฆฌ์Šคํ‹ฑ ์•Œ๊ณ ๋ฆฌ์ฆ˜์„ ์ œ์‹œํ•œ๋‹ค. ์‹คํ—˜ ๊ฒฐ๊ณผ, ๋ณธ ๋…ผ๋ฌธ์—์„œ ์ œ์‹œํ•œ ์•Œ๊ณ ๋ฆฌ์ฆ˜์€ ๊ธฐ์กด์— ์‚ฌ์šฉ๋˜์—ˆ๋˜ ํŒŒํ‹ฐ์…˜ ๊ธฐ๋ฐ˜ ์šฐ์„ ์ˆœ์œ„ ์Šค์ผ€์ค„๋ง ์•Œ๊ณ ๋ฆฌ์ฆ˜๊ณผ ํŒŒํ‹ฐ์…˜ ๊ธฐ๋ฐ˜ ์šฐ์„ ์ˆœ์œ„ ํ˜ผ์žก ์ค‘์š”๋„ ์•Œ๊ณ ๋ฆฌ์ฆ˜๋ณด๋‹ค ๋” ์ž‘์€ ์ˆ˜์˜ ์ฝ”์–ด์˜ ๊ฐœ์ˆ˜๋ฅผ ๋„์ถœ ํ•  ์ˆ˜ ์žˆ์Œ์„ ๋ณด์ธ๋‹ค. ์‹คํ—˜๊ฒฐ๊ณผ๋ฅผ ๊ธฐ๋ฐ˜์œผ๋กœ, ๋ณธ ์—ฐ๊ตฌ์—์„œ ์ œ์•ˆํ•œ ์•Œ๊ณ ๋ฆฌ์ฆ˜์„ ์žฌ๊ตฌ์„ฑ๊ฐ€๋Šฅ ์‹œ์Šคํ…œ์— ํ™œ์šฉํ•œ๋‹ค๋ฉด ๊ธฐ์กด ๋ฐฉ๋ฒ• ๋Œ€๋น„ ์ตœ๋Œ€ 18%์˜ ์ฝ”์–ด์ ˆ๊ฐํšจ๊ณผ๋ฅผ ๊ธฐ๋Œ€ํ• ์ˆ˜ ์žˆ๋‹ค.1 Introduction 1 1.1 Motivation and Objective 1 1.2 Approach 2 1.3 Organization 6 2 System Model 7 3 Schedulability Analysis 10 3.1 Background 10 3.2 Optimal Capacity Analysis During Normal State 14 3.3 Optimal Capacity Analysis During Fault State 16 3.4 Periodic Resource Wide Schedulability Test 20 3.5 Non-Critical Task Overlapping 24 4 Proposed Approach 26 4.1 Minimum Harmonic Partitions of the Task Set 26 4.2 Proposed Heuristic Algorithm 28 4.2.1 Choosing Detection method 28 4.2.2 Packing Minimum Harmonic Partitions 29 4.2.3 Packing Free Tasks 30 4.2.4 Packing Non-Critical Tasks 31 4.3 Algorithm Description 32 5 Evaluation 35 5.1 Experimental Setup 35 5.2 Simulation Results 36 5.2.1 Free Task Bin-Packing 38 5.2.2 Minimum Harmonic Partitions Bin-Packing 40 5.2.3 Effect of Non-Critical Task Overlapping 43 5.2.4 Effect of State-Wise Computation 45 6 Related Works 46 6.1 Hierarchical Fault-Tolerant Real-Time Scheduling 46 6.2 Error Detection Method 46 7 Conclusion 48 References 50Maste
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