Using a SAT solver to generate checking sequences

Methods for software testing based on Finite State Machines (FSMs) have been researched since the early 60’s. Many of these methods are about generating a checking sequence from a given FSM which is an input sequence that determines whether an implementation of the FSM is faulty or correct. In this paper, we consider one of these methods, which constructs a checking sequence by reducing the problem of generating a checking sequence to finding a Chinese rural postman tour on a graph induced by the FSM; we re-formulate the constraints used in this method as a set of Boolean formulas; and use a SAT solver to generate a checking sequence of minimal length

Reduced length checking sequences

Here, the method proposed by Ural, Wu and Zhang (1997) for constructing minimal-length checking sequences based on distinguishing sequences is improved. The improvement is based on optimizations of the state recognition sequences and their use in constructing test segments. It is shown that the proposed improvement further reduces the length of checking sequences produced from minimal, completely specified, and deterministic finite state machines

Distinguishing sequences for partially specified FSMs

Distinguishing Sequences (DSs) are used inmany Finite State Machine (FSM) based test techniques. Although Partially Specified FSMs (PSFSMs) generalise FSMs, the computational complexity of constructing Adaptive and Preset DSs (ADSs/PDSs) for PSFSMs has not been addressed. This paper shows that it is possible to check the existence of an ADS in polynomial time but the corresponding problem for PDSs is PSPACE-complete. We also report on the results of experiments with benchmarks and over 8 * 106 PSFSMs. © 2014 Springer International Publishing

Организация и принцип работы многофункциональных схем моделирования

Предложены механизмы для реализации многофункциональных схем моделирования. Показана реализация схемы моделирования с разомкнутой структурой, рассмотрены временные режимы работы последовательной многофункциональной схемы. Приведена реализация циклической многофункциональной схемы моделирования и ее реализация в терминах Е-сети. Представлена реализация разработанной замкнутой многофункциональной схемы моделирования, обеспечивающей многократное селективное обслуживание группы разнородных функциональных процессов с минимальным количеством Е-сетевых моделей

Using distinguishing and UIO sequences together in a checking sequence

If a finite state machine M does not have a distinguishing sequence, but has UIO sequences for its states, there are methods to produce a checking sequence for M. However, if M has a distinguishing sequence D, then there are methods that make use of D to construct checking sequences that are much shorter than the ones that would be constructed by using only the UIO sequences for M. The methods to applied when a distinguishing sequence exists, only make use of the distinguishing sequences. In this paper we show that, even if M has a distinguishing sequence D, the UIO sequences can still be used together with D to construct shorter checking sequences

Generating Complete and Finite Test Suite for ioco: Is It Possible?

Testing from Input/Output Transition Systems has been intensely investigated. The conformance between the implementation and the specification is often determined by the so-called ioco-relation. However, generating tests for ioco is usually hindered by the problem of conflicts between inputs and outputs. Moreover, the generation is mainly based on nondeterministic methods, which may deliver complete test suites but require an unbounded number of executions. In this paper, we investigate whether it is possible to construct a finite test suite which is complete in a predefined fault domain for the classical ioco relation even in the presence of input/output conflicts. We demonstrate that it is possible under certain assumptions about the specification and implementation, by proposing a method for complete test generation, based on a traditional method developed for FSM.Comment: In Proceedings MBT 2014, arXiv:1403.704

Improved test quality using robust unique input/output circuit sequences (UIOCs)

In finite state machine (FSM) based testing, the problem of fault masking in the unique input/ output (UIO) sequence may degrade the test performance of the UIO based methods. This paper investigates this problem and proposes the use of a new type of unique input/output circuit (UIOC) sequence for state verification, which may help to overcome the drawbacks that exist in the UIO based techniques. When constructing a UIOC, overlap and internal state observation schema are used to increase the robustness of a test sequence. Test quality is compared by using the forward UIO method (F-method), the backward UIO method (B-method) and the UIOC method (C-method) separately. Robustness of the UIOCs constructed by the algorithm given in this paper is also compared with those constructed by the algorithm given previously. Experimental results suggest that the C-method outperforms the F- and the B-methods and the UIOCs constructed by the Algorithm given in this paper, are more robust than those constructed by other proposed algorithms

Software integration testing based on communication coverage criteria and partial model generation

This paper considers the problem of integration testing the components of a timed distributed software system. We assume that communication between the components is specified using timed interface automata and use computational tree logic (CTL) to define communication-based coverage criteria that refer to send- and receive-statements and communication paths. The proposed method enables testers to focus during component integration on such parts of the specification, e.g. behaviour specifications or Markovian usage models, that are involved in the communication between components to be integrated. A more specific application area of this approach is the integration of test-models, e.g. a transmission gear can be tested based on separated models for the driver behaviour, the engine condition, and the mechanical and hydraulical transmission states. Given such a state-based specification of a distributed system and a concrete coverage goal, a model checker is used in order to determine the coverage or generate test sequences that achieve the goal. Given the generated test sequences we derive a partial test-model of the components from which the test sequences are derived. The partial model can be used to drive further testing and can also be used as the basis for producing additional partial models in incremental integration testing. While the process of deriving the test sequences could suffer from a combinatorial explosion, the effort required to generate the partial model is polynomial in the number of test sequences and their length. Thus, where it is not feasible to produce test sequences that achieve a given type of coverage it is still possible to produce a partial model on the basis of test sequences generated to achieve some other criterion. As a result, the process of generating a partial model has the potential to scale to large industrial software systems. While a particular model checker, UPPAAL, was used, it should be relatively straightforward to adapt the approach for use with other CTL based model checkers. A potential additional benefit of the approach is that it provides a visual description of the state-based testing of distributed systems, which may be beneficial in other contexts such as education and comprehension

Синтез тестов с гарантированной полнотой для временных автоматов

Предложен алгоритм построения полного проверяющего теста для временного автомата относительно модели "черного ящика". Предполагается, что в проверяемом автомате известны только верхняя оценка числа состояний и величина максимальной конечной задержки в состоянии. Полный тест строится по автомату-спецификации без перебора проверяемых автоматов

Генерация тестовых сценариев на основе формальной модели

Описан метод направленного поиска для автоматического построения тестовых сценариев в процессе верификации. Основная цель – достижение семантического соответствия между полученными тестовыми сценариями и функциональными спецификациями к системе. Метод использует определяемые пользователем в виде регулярных выражений цели тестирования и ограничения обхода поведения модели.A guided search method for automatic test scenario building during verification described. The main goal is to achieve semantic correspondence between obtained test scenarios and functional specifications of a system. The method uses user-defined regular expressions as test purposes and for model behavior traversal bounding