Experimental SEFDM Pipelined Iterative Detection Architecture with Improved Throughput

In spectrally efficient frequency division multiplexing (SEFDM), the separation between subcarriers is reduced below the Nyquist criteria, enhancing bandwidth utilisation in comparison to orthogonal frequency division multiplexing (OFDM). This leads to self-induced inter-carrier interference (ICI) in the SEFDM signal, which requires more sophisticated detectors to retrieve the transmitted data. In previous work, iterative detectors (IDs) have been used to recover the SEFDM signal after processing a certain number of iterations, however, the sequential iterative process increases the processing time with the number of iterations, leading to throughput reduction. In this work, ID pipelining is designed and implemented in software defined radio (SDR) to reduce the overall system detection latency and improve the throughput. Thus, symbols are allocated into parallel IDs that have no waiting time as they are received. Our experimental findings show that throughput will improve linearly with the number of the paralleled ID elements, however, hardware complexity also increases linearly with the number of ID elements

Spectrum Optimisation in Wireless Communication Systems: Technology Evaluation, System Design and Practical Implementation

Two key technology enablers for next generation networks are examined in this thesis, namely Cognitive Radio (CR) and Spectrally Efficient Frequency Division Multiplexing (SEFDM). The first part proposes the use of traffic prediction in CR systems to improve the Quality of Service (QoS) for CR users. A framework is presented which allows CR users to capture a frequency slot in an idle licensed channel occupied by primary users. This is achieved by using CR to sense and select target spectrum bands combined with traffic prediction to determine the optimum channel-sensing order. The latter part of this thesis considers the design, practical implementation and performance evaluation of SEFDM. The key challenge that arises in SEFDM is the self-created interference which complicates the design of receiver architectures. Previous work has focused on the development of sophisticated detection algorithms, however, these suffer from an impractical computational complexity. Consequently, the aim of this work is two-fold; first, to reduce the complexity of existing algorithms to make them better-suited for application in the real world; second, to develop hardware prototypes to assess the feasibility of employing SEFDM in practical systems. The impact of oversampling and fixed-point effects on the performance of SEFDM is initially determined, followed by the design and implementation of linear detection techniques using Field Programmable Gate Arrays (FPGAs). The performance of these FPGA based linear receivers is evaluated in terms of throughput, resource utilisation and Bit Error Rate (BER). Finally, variants of the Sphere Decoding (SD) algorithm are investigated to ameliorate the error performance of SEFDM systems with targeted reduction in complexity. The Fixed SD (FSD) algorithm is implemented on a Digital Signal Processor (DSP) to measure its computational complexity. Modified sorting and decomposition strategies are then applied to this FSD algorithm offering trade-offs between execution speed and BER

Non-Orthogonal Signal and System Design for Wireless Communications

The thesis presents research in non-orthogonal multi-carrier signals, in which: (i) a new signal format termed truncated orthogonal frequency division multiplexing (TOFDM) is proposed to improve data rates in wireless communication systems, such as those used in mobile/cellular systems and wireless local area networks (LANs), and (ii) a new design and experimental implementation of a real-time spectrally efficient frequency division multiplexing (SEFDM) system are reported. This research proposes a modified version of the orthogonal frequency division multiplexing (OFDM) format, obtained by truncating OFDM symbols in the time-domain. In TOFDM, subcarriers are no longer orthogonally packed in the frequency-domain as time samples are only partially transmitted, leading to improved spectral efficiency. In this work, (i) analytical expressions are derived for the newly proposed TOFDM signal, followed by (ii) interference analysis, (iii) systems design for uncoded and coded schemes, (iv) experimental implementation and (v) performance evaluation of the new proposed signal and system, with comparisons to conventional OFDM systems. Results indicate that signals can be recovered with truncated symbol transmission. Based on the TOFDM principle, a new receiving technique, termed partial symbol recovery (PSR), is designed and implemented in software de ned radio (SDR), that allows efficient operation of two users for overlapping data, in wireless communication systems operating with collisions. The PSR technique is based on recovery of collision-free partial OFDM symbols, followed by the reconstruction of complete symbols to recover progressively the frames of two users suffering collisions. The system is evaluated in a testbed of 12-nodes using SDR platforms. The thesis also proposes channel estimation and equalization technique for non-orthogonal signals in 5G scenarios, using an orthogonal demodulator and zero padding. Finally, the implementation of complete SEFDM systems in real-time is investigated and described in detail

Bandwidth Compressed Waveform and System Design for Wireless and Optical Communications: Theory and Practice

This thesis addresses theoretical and practical challenges of spectrally efficient frequency division multiplexing (SEFDM) systems in both wireless and optical domains. SEFDM improves spectral efficiency relative to the well-known orthogonal frequency division multiplexing (OFDM) by non-orthogonally multiplexing overlapped sub-carriers. However, the deliberate violation of orthogonality results in inter carrier interference (ICI) and associated detection complexity, thus posing many challenges to practical implementations. This thesis will present solutions for these issues. The thesis commences with the fundamentals by presenting the existing challenges of SEFDM, which are subsequently solved by proposed transceivers. An iterative detection (ID) detector iteratively removes self-created ICI. Following that, a hybrid ID together with fixed sphere decoding (FSD) shows an optimised performance/complexity trade-off. A complexity reduced Block-SEFDM can subdivide the signal detection into several blocks. Finally, a coded Turbo-SEFDM is proved to be an efficient technique that is compatible with the existing mobile standards. The thesis also reports the design and development of wireless and optical practical systems. In the optical domain, given the same spectral efficiency, a low-order modulation scheme is proved to have a better bit error rate (BER) performance when replacing a higher order one. In the wireless domain, an experimental testbed utilizing the LTE-Advanced carrier aggregation (CA) with SEFDM is operated in a realistic radio frequency (RF) environment. Experimental results show that 40% higher data rate can be achieved without extra spectrum occupation. Additionally, a new waveform, termed Nyquist-SEFDM, which compresses bandwidth and suppresses out-of-band power leakage is investigated. A 4th generation (4G) and 5th generation (5G) coexistence experiment is followed to verify its feasibility. Furthermore, a 60 GHz SEFDM testbed is designed and built in a point-to-point indoor fiber wireless experiment showing 67% data rate improvement compared to OFDM. Finally, to meet the requirements of future networks, two simplified SEFDM transceivers are designed together with application scenarios and experimental verifications

Wireless multi-carrier communication system design and implementation using a custom hardware and software FPGA platform

Field Programmable Gate Array (FPGA) devices and high-level hardware development languages represent a new and exciting addition to traditional research tools, where simulation models can be evaluated by the direct implementation of complex algorithms and processes. Signal processing functions that are based on well known and standardised mathematical operations, such as Fast Fourier Transforms (FFTs), are well suited for FPGA implementation. At UCL, research is on-going on the design, modelling and simulation of Frequency Division Multiplexing (FDM) techniques such as Spectrally E - cient Frequency Division Multiplexing (SEFDM) which, for a given data rate, require less bandwidth relative to equivalent Orthogonal Frequency Division Multiplexing (OFDM). SEFDM is based around standard mathematical functions and is an ideal candidate for FPGA implementation. The aim of the research and engineering work reported in this thesis is to design and implement a system that generates SEFDM signals for the purposes of testing and veri cation, in real communication environments. The aim is to use FPGA hardware and Digital to Analogue Converters (DACs) to generate such signals and allow recon gurability using standard interfaces and user friendly software. The thesis details the conceptualisation, design and build of an FPGA-based wireless signal generation platform. The characterisation applied to the system, using the FPGA to drive stimulus signals is reported and the thesis will include details of the FPGA encapsulation of the minimum protocol elements required for communication (of control signals) over Ethernet. Detailed testing of the hardware is reported, together with a newly designed in the loop testing methodology. Veri ed test results are also reported with full details of time and frequency results as well as full FPGA design assessment. Altogether, the thesis describes the engineering design, construction and testing of a new FPGA hardware and software system for use in communication test scenarios, controlled over Ethernet

Timing-Error Tolerance Techniques for Low-Power DSP: Filters and Transforms

Low-power Digital Signal Processing (DSP) circuits are critical to commercial System-on-Chip design for battery powered devices. Dynamic Voltage Scaling (DVS) of digital circuits can reclaim worst-case supply voltage margins for delay variation, reducing power consumption. However, removing static margins without compromising robustness is tremendously challenging, especially in an era of escalating reliability concerns due to continued process scaling. The Razor DVS scheme addresses these concerns, by ensuring robustness using explicit timing-error detection and correction circuits. Nonetheless, the design of low-complexity and low-power error correction is often challenging. In this thesis, the Razor framework is applied to fixed-precision DSP filters and transforms. The inherent error tolerance of many DSP algorithms is exploited to achieve very low-overhead error correction. Novel error correction schemes for DSP datapaths are proposed, with very low-overhead circuit realisations. Two new approximate error correction approaches are proposed. The first is based on an adapted sum-of-products form that prevents errors in intermediate results reaching the output, while the second approach forces errors to occur only in less significant bits of each result by shaping the critical path distribution. A third approach is described that achieves exact error correction using time borrowing techniques on critical paths. Unlike previously published approaches, all three proposed are suitable for high clock frequency implementations, as demonstrated with fully placed and routed FIR, FFT and DCT implementations in 90nm and 32nm CMOS. Design issues and theoretical modelling are presented for each approach, along with SPICE simulation results demonstrating power savings of 21 – 29%. Finally, the design of a baseband transmitter in 32nm CMOS for the Spectrally Efficient FDM (SEFDM) system is presented. SEFDM systems offer bandwidth savings compared to Orthogonal FDM (OFDM), at the cost of increased complexity and power consumption, which is quantified with the first VLSI architecture

On the Road to 6G: Visions, Requirements, Key Technologies and Testbeds

Fifth generation (5G) mobile communication systems have entered the stage of commercial development, providing users with new services and improved user experiences as well as offering a host of novel opportunities to various industries. However, 5G still faces many challenges. To address these challenges, international industrial, academic, and standards organizations have commenced research on sixth generation (6G) wireless communication systems. A series of white papers and survey papers have been published, which aim to define 6G in terms of requirements, application scenarios, key technologies, etc. Although ITU-R has been working on the 6G vision and it is expected to reach a consensus on what 6G will be by mid-2023, the related global discussions are still wide open and the existing literature has identified numerous open issues. This paper first provides a comprehensive portrayal of the 6G vision, technical requirements, and application scenarios, covering the current common understanding of 6G. Then, a critical appraisal of the 6G network architecture and key technologies is presented. Furthermore, existing testbeds and advanced 6G verification platforms are detailed for the first time. In addition, future research directions and open challenges are identified for stimulating the on-going global debate. Finally, lessons learned to date concerning 6G networks are discussed