Linear Operation of Switch-Mode Outphasing Power Amplifiers

Radio transceivers are playing an increasingly important role in modern society. The ”connected” lifestyle has been enabled by modern wireless communications. The demand that has been placed on current wireless and cellular infrastructure requires increased spectral efficiency however this has come at the cost of power efficiency. This work investigates methods of improving wireless transceiver efficiency by enabling more efficient power amplifier architectures, specifically examining the role of switch-mode power amplifiers in macro cell scenarios. Our research focuses on the mechanisms within outphasing power amplifiers which prevent linear amplification. From the analysis it was clear that high power non-linear effects are correctable with currently available techniques however non-linear effects around the zero crossing point are not. As a result signal processing techniques for suppressing and avoiding non-linear operation in low power regions are explored. A novel method of digital pre-distortion is presented, and conventional techniques for linearisation are adapted for the particular needs of the outphasing power amplifier. More unconventional signal processing techniques are presented to aid linearisation of the outphasing power amplifier, both zero crossing and bandwidth expansion reduction methods are designed to avoid operation in nonlinear regions of the amplifiers. In combination with digital pre-distortion the techniques will improve linearisation efforts on outphasing systems with dynamic range and bandwidth constraints respectively. Our collaboration with NXP provided access to a digital outphasing power amplifier, enabling empirical analysis of non-linear behaviour and comparative analysis of behavioural modelling and linearisation efforts. The collaboration resulted in a bench mark for linear wideband operation of a digital outphasing power amplifier. The complimentary linearisation techniques, bandwidth expansion reduction and zero crossing reduction have been evaluated in both simulated and practical outphasing test benches. Initial results are promising and indicate that the benefits they provide are not limited to the outphasing amplifier architecture alone. Overall this thesis presents innovative analysis of the distortion mechanisms of the outphasing power amplifier, highlighting the sensitivity of the system to environmental effects. Practical and novel linearisation techniques are presented, with a focus on enabling wide band operation for modern communications standards

Dispersive properties of quasi-phase-matched optical parametric amplifiers

The dispersive properties of non-degenerate optical parametric amplification in quasi-phase-matched (QPM) nonlinear quadratic crystals with an arbitrary grating profile are theoretically investigated in the no-pump-depletion limit. The spectral group delay curve of the amplifier is shown to be univocally determined by its spectral power gain curve through a Hilbert transform. Such a constraint has important implications on the propagation of spectrally-narrow optical pulses through the amplifier. In particular, it is shown that anomalous transit times, corresponding to superluminal or even negative group velocities, are possible near local minima of the spectral gain curve. A possible experimental observation of such effects using a QPM Lithium-Niobate crystal is suggested.Comment: submitted for publicatio

Development of High-Efficiency Switch-Mode Concurrent Dual-Band RF Power Amplifiers

For the past ten years, we’ve seen the rapid development of wireless communication along with the number of frequency bands to be supported in a wireless device. RF power amplifiers (PAs), as the last and most important stage in a transmitter, then have to support the increasing number of frequency bands and operation modes. The solution that has been used in industry is simply to increase the number of PAs with each of them covers several adjacent frequency bands. It might be feasible from 2G to 4G since the frequency range is confined within low GHz (\u3c3 GHz), however, as 5G comes, not only the number of frequency band will keep increasing, but the frequency range will expand to much higher ranges (~6 GHz, 30 GHz, 60 GHz, etc.). Higher frequency range will need much more PAs and thus make the traditional solution impractical due to constrained cost and area. In addition, carrier aggregation technique used in 4G and future 5G requires additional filters (diplexer/triplexer) to combines different single-band PAs which will introduce extra power loss. Multi-band PAs that are able to operate at several frequency bands (not adjacent to each other) simultaneous could potentially reduce the number of PAs and filters thus making the increasingly complicate RF front end feasible in terms of area and cost with reduced power loss. Such PAs are defined as concurrent multi-band PAs. Unfortunately, traditional multi-band PAs were designed for operate one band at a time and thus experienced significant efficiency and output power drop when operate concurrently. A few concurrent dual-band PAs were designed in recent years targeting concurrent operation. However, the drop in both efficiency and output power were still too much to make those PAs useful in actual applications. The performance of existing concurrent dual-band PAs are mainly limited by their linear-type topology. In this thesis, a switch-mode concurrent dual-band PAs was developed for the first time which, as expected, could achieve higher efficiency with minimum drop in both efficiency and output power. A concurrent dual-band current-switching class-D PA was proposed in this thesis, and developed from fundamental theories, design methodology, to actual implementation and finally measurement results. The theoretical analysis showed that, the proposed PA could provide a concurrent-mode (two carriers simultaneously) drain efficiency of 87% at 6 dB over drive which was only 5% lower than single-mode operation (one carrier at a time). A concurrent dual-band class-B PA (one of linear-type PAs) on the other hand only have a maximum concurrent-mode drain efficiency 62.5%, 16% lower than single-mode case. The output power drop was also reduced from 3 dB in linear-type PAs to 1.2 dB in the proposed PA. The design of the proposed PA however was complicated due to a large number of harmonics and intermodulation components (IMs) to be properly terminated at the output. To reduce the design complexity, the tradeoff between number of harmonics/IMs to be properly terminated and efficiency was discussed based on ADS simulation. It was found out that, the 2nd harmonics and IM2 were critical to maintain high efficiency, 3rd harmonics and IM3 however had smaller effect on efficiency thus can be neglected (partially) to greatly reduce design complexity with tolerable efficiency degradation. The bias effect was also explored and was suggested that the PA should be bias into triode (defined in Chapter 4) or in other words, bias above class A, in order to achieve high efficiency. The proposed PA was implemented in a push-pull structure which need a balun at both output and input. The design equations of balun were derived in this thesis together with some parameter optimization for minimum imbalance and largest bandwidth. The output balun provides not only differential to single-ended conversion but also a 1:4 impedance transformation. The final PA was fabricated and measured in lab. A drain efficiency of 60% was achieve when operating concurrently at 880 MHz and 1.49 GHz with less than 0.5 dB output power drop compared single-mode operation. The performance was among the best concurrent dual-band PAs. Measurement results together with simulation results show that the proposed PA has the ability to achieve much higher efficiency than linear-type concurrent dual-band PAs with minimum efficiency and output power drop, and thus is capable to make increasingly complicated RF FEM feasibl

Doctor of Philosophy

dissertationHigh speed wireless communication systems (e.g., long-term evolution (LTE), Wi-Fi) operate with high bandwidth and large peak-to-average power ratios (PAPRs). This is largely due to the use of orthogonal frequency division multiplexing (OFDM) modulation that is prevalent to maximize the spectral efficiency of the communication system. The power amplifier (PA) in the transmitter is the dominant energy consumer in the radio, largely because of the PAPR of the input signal. To reduce the energy consumption of the PA an amplifier that simultaneously achieves high efficiency and high linearity. Furthermore, to lower the cost for high volume production, it is desirable to achieve a complete System-on-Chip (SoC) integration. Linear amplifiers (e.g., Class-A, -B, -AB) are inefficient when amplifying signals with large PAPR that is associated by high peak-to-average modulation techniques such as LTE. OFDM. Switching amplifiers (e.g., Class-D, -E, -F) are very promising due to their high efficiency when compared to their linear amplifier counterparts. Linearization techniques for switching amplifiers have been intensively investigated due to their limited sensitivity to the input amplitude of the signal. Deep-submicron CMOS technology is mostly utilized for logic circuitry, and the Moore's law scaling of CMOS optimizes transistors to operate as high-speed and low-loss switches rather than high gain transistors. Hence, it is advantageous to use transistors in switching mode as switching amplifies and use high-speed digital logic circuitry to implement linearization systems and circuitry. In this work, several linearization architectures are investigated and demonstrated. An envelope elimination and restoration (EER) transmitter that comprises a class-E power amplifier and a 10-bit digital-to-analog converter (DAC) controlled current modulator is investigated. A pipelined switched-capacitor DAC is designed to control an open-loop transconductor that operates as a current modulator, modulating the amplitude of the current supplied to a class-E PA. Such a topology allows for increased filtering of the quantization noise that is problematic in most digital PAs (DPA). The proposed quadrature and multiphase architecture can avoid the bandwidth expansion and delay mismatch associated with polar PAs. The multiphase switched capacitor power amplifier (SCPA) was proposed after the quadrature SCPA and it significantly improves the power efficiency

Fluidics research, including vortex and jet pipe valves

The research at the Systems and Control Laboratory is reported. Topics discussed include: response characteristics of laminar fluidic amplifiers, power amplification with a vortex valve, pulse-supply-mode fluidics, speed control system employing a jet pipe valve, and the fluidics reference center

Analog dithering techniques for highly linear and efficient transmitters

The current thesis is about investigation of new methods and techniques to be able to utilize the switched mode amplifiers, for linear and efficient applications. Switched mode amplifiers benefit from low overlap between the current and voltage wave forms in their output terminals, but they seriously suffer from nonlinearity. This makes it impossible to use them to amplify non-constant envelope message signals, where very high linearity is expected. In order to do that, dithering techniques are studied and a full linearity analysis approach is developed, by which the linearity performance of the dithered amplifier can be analyzed, based on the dithering level and frequency. The approach was based on orthogonalization of the equivalent nonlinearity and is capable of prediction of both co-channel and adjacent channel nonlinearity metrics, for a Gaussian complex or real input random signal. Behavioral switched mode amplifier models are studied and new models are developed, which can be utilized to predict the nonlinear performance of the dithered power amplifier, including the nonlinear capacitors effects. For HFD application, self-oscillating and asynchronous sigma delta techniques are currently used, as pulse with modulators (PWM), to encode a generic RF message signal, on the duty cycle of an output pulse train. The proposed models and analysis techniques were applied to this architecture in the first phase, and the method was validated with measurement on a prototype sample, realized in 65 nm TSMC CMOS technology. Afterwards, based on the same dithering phenomenon, a new linearization technique was proposed, which linearizes the switched mode class D amplifier, and at the same time can reduce the reactive power loss of the amplifier. This method is based on the dithering of the switched mode amplifier with frequencies lower than the band-pass message signal and is called low frequency dithering (LFD). To test this new technique, two test circuits were realized and the idea was applied to them. Both of the circuits were of the hard nonlinear type (class D) and are integrated CMOS and discrete LDMOS technologies respectively. The idea was successfully tested on both test circuits and all of the linearity metric predictions for a digitally modulated RF signal and a random signal were compared to the measurements. Moreover a search method to find the optimum dither frequency was proposed and validated. Finally, inspired by averaging interpretation of the dithering phenomenon, three new topologies were proposed, which are namely DLM, RF-ADC and area modulation power combining, which are all nonlinear systems linearized with dithering techniques. A new averaging method was developed and used for analysis of a Gilbert cell mixer topology, which resulted in a closed form relationship for the conversion gain, for long channel devices