Energy Aware Design and Analysis for Synchronous and Asynchronous Circuits

Power dissipation has become a major concern for IC designers. Various low power design techniques have been developed for synchronous circuits. Asynchronous circuits, however. have gained more interests recently due to their benefits in lower noise, easy timing control, etc. But few publications on energy reduction techniques for asynchronous logic are available. Power awareness indicates the ability of the system power to scale with changing conditions and quality requirements. Scalability is an important figure-of-merit since it allows the end user to implement operational policy. just like the user of mobile multimedia equipment needs to select between better quality and longer battery operation time. This dissertation discusses power/energy optimization and performs analysis on both synchronous and asynchronous logic. The major contributions of this dissertation include: 1 ) A 2-Dimensional Pipeline Gating technique for synchronous pipelined circuits to improve their power awareness has been proposed. This technique gates the corresponding clock lines connected to registers in both vertical direction (the data flow direction) and horizontal direction (registers within each pipeline stage) based on current input precision. 2) Two energy reduction techniques, Signal Bypassing & Insertion and Zero Insertion. have been developed for NCL circuits. Both techniques use Nulls to replace redundant Data 0\u27s based on current input precision in order to reduce the switching activity while Signal Bypassing & Insertion is for non-pipelined NCI, circuits and Zero Insertion is for pipelined counterparts. A dynamic active-bit detection scheme is also developed as an expansion. 3) Two energy estimation techniques, Equivalent Inverter Modeling based on Input Mapping in transistor-level and Switching Activity Modeling in gate-level, have been proposed. The former one is for CMOS gates with feedbacks and the latter one is for NCL circuits

Network-on-Chip

Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip: The Next Generation of System-on-Chip Integration examines the current issues restricting chip-on-chip communication efficiency, and explores Network-on-chip (NoC), a promising alternative that equips designers with the capability to produce a scalable, reusable, and high-performance communication backbone by allowing for the integration of a large number of cores on a single system-on-chip (SoC). This book provides a basic overview of topics associated with NoC-based design: communication infrastructure design, communication methodology, evaluation framework, and mapping of applications onto NoC. It details the design and evaluation of different proposed NoC structures, low-power techniques, signal integrity and reliability issues, application mapping, testing, and future trends. Utilizing examples of chips that have been implemented in industry and academia, this text presents the full architectural design of components verified through implementation in industrial CAD tools. It describes NoC research and developments, incorporates theoretical proofs strengthening the analysis procedures, and includes algorithms used in NoC design and synthesis. In addition, it considers other upcoming NoC issues, such as low-power NoC design, signal integrity issues, NoC testing, reconfiguration, synthesis, and 3-D NoC design. This text comprises 12 chapters and covers: The evolution of NoC from SoC—its research and developmental challenges NoC protocols, elaborating flow control, available network topologies, routing mechanisms, fault tolerance, quality-of-service support, and the design of network interfaces The router design strategies followed in NoCs The evaluation mechanism of NoC architectures The application mapping strategies followed in NoCs Low-power design techniques specifically followed in NoCs The signal integrity and reliability issues of NoC The details of NoC testing strategies reported so far The problem of synthesizing application-specific NoCs Reconfigurable NoC design issues Direction of future research and development in the field of NoC Network-on-Chip: The Next Generation of System-on-Chip Integration covers the basic topics, technology, and future trends relevant to NoC-based design, and can be used by engineers, students, and researchers and other industry professionals interested in computer architecture, embedded systems, and parallel/distributed systems

Relaminarisation of Re_{\tau} = 100 channel flow with globally stabilising linear feedback control

The problems of nonlinearity and high dimension have so far prevented a complete solution of the control of turbulent flow. Addressing the problem of nonlinearity, we propose a flow control strategy which ensures that the energy of any perturbation to the target profile decays monotonically. The controller's estimate of the flow state is similarly guaranteed to converge to the true value. We present a one-time off-line synthesis procedure, which generalises to accommodate more restrictive actuation and sensing arrangements, with conditions for existence for the controller given in this case. The control is tested in turbulent channel flow ($Re_\tau=100$) using full-domain sensing and actuation on the wall-normal velocity. Concentrated at the point of maximum inflection in the mean profile, the control directly counters the supply of turbulence energy arising from the interaction of the wall-normal perturbations with the flow shear. It is found that the control is only required for the larger-scale motions, specifically those above the scale of the mean streak spacing. Minimal control effort is required once laminar flow is achieved. The response of the near-wall flow is examined in detail, with particular emphasis on the pressure and wall-normal velocity fields, in the context of Landahl's theory of sheared turbulence

Uncertainty Quantification of the Responses of Transient Electromagnetic Disturbance Coupling to Transmission Lines Based on Stochastic Models

L'abstract è presente nell'allegato / the abstract is in the attachmen

Relaminarisation of Re_τ=100 channel flow with globally stabilising linear feedback control

The problems of nonlinearity and high dimension have so far prevented a complete solution of the control of turbulent flow. Addressing the problem of nonlinearity, we propose a flow control strategy which ensures that the energy of any perturbation to the target profile decays monotonically. The controller’s estimate of the flow state is similarly guaranteed to converge to the true value. We present a one-time off-line synthesis procedure, which generalises to accommodate more restrictive actuation and sensing arrangements, with conditions for existence for the controller given in this case. The control is tested in turbulent channel flow (Re_τ = 100) using full-domain sensing and actuation on the wall-normal velocity. Concentrated at the point of maximum inflection in the mean profile, the control directly counters the supply of turbulence energy arising from the interaction of the wall-normal perturbations with the flow shear. It is found that the control is only required for the larger-scale motions, specifically those above the scale of the mean streak spacing. Minimal control effort is required once laminar flow is achieved. The response of the near-wall flow is examined in detail, with particular emphasis on the pressure and wall-normal velocity fields, in the context of Landahl’s theory of sheared turbulence

Chapter One – An Overview of Architecture-Level Power- and Energy-Efficient Design Techniques

Power dissipation and energy consumption became the primary design constraint for almost all computer systems in the last 15 years. Both computer architects and circuit designers intent to reduce power and energy (without a performance degradation) at all design levels, as it is currently the main obstacle to continue with further scaling according to Moore's law. The aim of this survey is to provide a comprehensive overview of power- and energy-efficient “state-of-the-art” techniques. We classify techniques by component where they apply to, which is the most natural way from a designer point of view. We further divide the techniques by the component of power/energy they optimize (static or dynamic), covering in that way complete low-power design flow at the architectural level. At the end, we conclude that only a holistic approach that assumes optimizations at all design levels can lead to significant savings.Peer ReviewedPostprint (published version

Application of advanced on-board processing concepts to future satellite communications systems

An initial definition of on-board processing requirements for an advanced satellite communications system to service domestic markets in the 1990's is presented. An exemplar system architecture with both RF on-board switching and demodulation/remodulation baseband processing was used to identify important issues related to system implementation, cost, and technology development

Energy efficient enabling technologies for semantic video processing on mobile devices

Semantic object-based processing will play an increasingly important role in future multimedia systems due to the ubiquity of digital multimedia capture/playback technologies and increasing storage capacity. Although the object based paradigm has many undeniable benefits, numerous technical challenges remain before the applications becomes pervasive, particularly on computational constrained mobile devices. A fundamental issue is the ill-posed problem of semantic object segmentation. Furthermore, on battery powered mobile computing devices, the additional algorithmic complexity of semantic object based processing compared to conventional video processing is highly undesirable both from a real-time operation and battery life perspective. This thesis attempts to tackle these issues by firstly constraining the solution space and focusing on the human face as a primary semantic concept of use to users of mobile devices. A novel face detection algorithm is proposed, which from the outset was designed to be amenable to be offloaded from the host microprocessor to dedicated hardware, thereby providing real-time performance and reducing power consumption. The algorithm uses an Artificial Neural Network (ANN), whose topology and weights are evolved via a genetic algorithm (GA). The computational burden of the ANN evaluation is offloaded to a dedicated hardware accelerator, which is capable of processing any evolved network topology. Efficient arithmetic circuitry, which leverages modified Booth recoding, column compressors and carry save adders, is adopted throughout the design. To tackle the increased computational costs associated with object tracking or object based shape encoding, a novel energy efficient binary motion estimation architecture is proposed. Energy is reduced in the proposed motion estimation architecture by minimising the redundant operations inherent in the binary data. Both architectures are shown to compare favourable with the relevant prior art

Investigation of methods for data communication and power delivery through metals

PhD ThesisThe retrieval of data from a sensor, enclosed by a metallic structure, such as a naval vessel, pipeline or nuclear flask is often very challenging. To maintain structural integrity it is not desirable to penetrate the wall of the structure, preventing any hard-wired solution. Furthermore, the conductive nature of the structure prevents the use of radio communications. Applications involving sealed containers also have a requirement for power delivery, as the periodic changing of batteries is not possible. Ultrasound has previously been identified as an attractive approach but there are two key challenges: efficient/reliable ultrasonic transduction and a method of overcoming the inherent multipath distortion resulting from boundary reflections. Previous studies have utilised piezoelectric contact transducers, however, they are impractical due to their reliance on coupling, i.e. the bond between the transducer and the metal surface, which leads to concerns over long term reliability. A non-contact transducer overcomes this key drawback, thus highlighting the electromagnetic acoustic transducer (EMAT) as a favourable alternative. This thesis presents the design and testing of an EMAT with appropriate characteristics for through-metal data communications. A low cost, low power data transmission scheme is presented for overcoming acoustic multipath based on pulse position modulation (PPM). Due to the necessary guard time, the data rate is limited to 50kbps. A second solution is presented employing continuous wave, Quadrature phase shift keying (QPSK) modulation, allowing data rates in excess of 1Mbps to be achieved. Equalisation is required to avoid intersymbol interference (ISI) and a decision feedback equaliser (DFE) is shown to be adept at mitigating this effect. The relatively low efficiency of an EMAT makes it unsuitable for power delivery, consequently, an alternative non-contact approach, utilising inductive coupling, is explored. Power transfer efficiency of ≈ 4% is shown to be achievable through 20mm thick stainless steel.ICS department of BAE Systems Submarine Solutions, EPSR

Optimal power control in green wireless sensor networks with wireless energy harvesting, wake-up radio and transmission control

Wireless sensor networks (WSNs) are autonomous networks of spatially distributed sensor nodes which are capable of wirelessly communicating with each other in a multi-hop fashion. Among different metrics, network lifetime and utility and energy consumption in terms of carbon footprint are key parameters that determine the performance of such a network and entail a sophisticated design at different abstraction levels. In this paper, wireless energy harvesting (WEH), wake-up radio (WUR) scheme and error control coding (ECC) are investigated as enabling solutions to enhance the performance of WSNs while reducing its carbon footprint. Specifically, a utility-lifetime maximization problem incorporating WEH, WUR and ECC, is formulated and solved using distributed dual subgradient algorithm based on Lagrange multiplier method. It is discussed and verified through simulation results to show how the proposed solutions improve network utility, prolong the lifetime and pave the way for a greener WSN by reducing its carbon footprint