19,418 research outputs found
Beyond Gaussian Pyramid: Multi-skip Feature Stacking for Action Recognition
Most state-of-the-art action feature extractors involve differential
operators, which act as highpass filters and tend to attenuate low frequency
action information. This attenuation introduces bias to the resulting features
and generates ill-conditioned feature matrices. The Gaussian Pyramid has been
used as a feature enhancing technique that encodes scale-invariant
characteristics into the feature space in an attempt to deal with this
attenuation. However, at the core of the Gaussian Pyramid is a convolutional
smoothing operation, which makes it incapable of generating new features at
coarse scales. In order to address this problem, we propose a novel feature
enhancing technique called Multi-skIp Feature Stacking (MIFS), which stacks
features extracted using a family of differential filters parameterized with
multiple time skips and encodes shift-invariance into the frequency space. MIFS
compensates for information lost from using differential operators by
recapturing information at coarse scales. This recaptured information allows us
to match actions at different speeds and ranges of motion. We prove that MIFS
enhances the learnability of differential-based features exponentially. The
resulting feature matrices from MIFS have much smaller conditional numbers and
variances than those from conventional methods. Experimental results show
significantly improved performance on challenging action recognition and event
detection tasks. Specifically, our method exceeds the state-of-the-arts on
Hollywood2, UCF101 and UCF50 datasets and is comparable to state-of-the-arts on
HMDB51 and Olympics Sports datasets. MIFS can also be used as a speedup
strategy for feature extraction with minimal or no accuracy cost
Speaker recognition using frequency filtered spectral energies
The spectral parameters that result from filtering the
frequency sequence of log mel-scaled filter-bank energies
with a simple first or second order FIR filter have proved
to be an efficient speech representation in terms of both
speech recognition rate and computational load. Recently,
the authors have shown that this frequency filtering can
approximately equalize the cepstrum variance enhancing
the oscillations of the spectral envelope curve that are
most effective for discrimination between speakers. Even
better speaker identification results than using melcepstrum
have been obtained on the TIMIT database,
especially when white noise was added. On the other
hand, the hybridization of both linear prediction and
filter-bank spectral analysis using either cepstral
transformation or the alternative frequency filtering has
been explored for speaker verification. The combination
of hybrid spectral analysis and frequency filtering, that
had shown to be able to outperform the conventional
techniques in clean and noisy word recognition, has yield
good text-dependent speaker verification results on the
new speaker-oriented telephone-line POLYCOST
database.Peer ReviewedPostprint (published version
Log-domain electronically-tuneable fully differential high order multi-function filter
This paper presents the synthesis of fully deferential circuit that is capable of performing simultaneous high-pass, low-pass, and band-pass filtering in the log domain. The circuit utilizes modified Seevinck’s integrators in the current mode. The transfer function describing the filter is first presented in the form of a canonical signal flow graph through applying Mason’s gain formula. The resulting signal flow graph consists of summing points and pick-off points associated with current mode integrators within unity-gain negative feedback loops. The summing points and the pick-off points are then synthesized as simple nodes and current mirrors, respectively. A new fully differential current-mode integrator circuit is proposed to realize the integration operation. The proposed integrator uses grounded capacitors with no resistors and can be adjusted to work as either lossless or lossy integrator via tuneable current sources. The gain and the cutoff frequency of the integrator are adjustable via biasing currents. Detailed design and simulation results of an example of a 5th order filter circuit is presented. The proposed circuit can perform simultaneously 5th order low-pass filtering, 5th order high-pass filtering, and 4th order band-pass filtering. The simulation is performed using Pspice with practical Infineon BFP649 BJT model. Simulation results show good matching with the target
Realization of Analog Wavelet Filter using Hybrid Genetic Algorithm for On-line Epileptic Event Detection
© 2020 The Author(s). This open access work is licensed under a Creative Commons Attribution 4.0 License. For more information, see http://creativecommons.org/licenses/by/4.0/.As the evolution of traditional electroencephalogram (EEG) monitoring unit for epilepsy diagnosis, wearable ambulatory EEG (WAEEG) system transmits EEG data wirelessly, and can be made miniaturized, discrete and social acceptable. To prolong the battery lifetime, analog wavelet filter is used for epileptic event detection in WAEEG system to achieve on-line data reduction. For mapping continuous wavelet transform to analog filter implementation with low-power consumption and high approximation accuracy, this paper proposes a novel approximation method to construct the wavelet base in analog domain, in which the approximation process in frequency domain is considered as an optimization problem by building a mathematical model with only one term in the numerator. The hybrid genetic algorithm consisting of genetic algorithm and quasi-Newton method is employed to find the globally optimum solution, taking required stability into account. Experiment results show that the proposed method can give a stable analog wavelet base with simple structure and higher approximation accuracy compared with existing method, leading to a better spike detection accuracy. The fourth-order Marr wavelet filter is designed as an example using Gm-C filter structure based on LC ladder simulation, whose power consumption is only 33.4 pW at 2.1Hz. Simulation results show that the design method can be used to facilitate low power and small volume implementation of on-line epileptic event detector.Peer reviewe
CMOS Hyperbolic Sine ELIN filters for low/audio frequency biomedical applications
Hyperbolic-Sine (Sinh) filters form a subclass of Externally-Linear-Internally-Non-
Linear (ELIN) systems. They can handle large-signals in a low power environment under half
the capacitor area required by the more popular ELIN Log-domain filters. Their inherent
class-AB nature stems from the odd property of the sinh function at the heart of their
companding operation. Despite this early realisation, the Sinh filtering paradigm has not
attracted the interest it deserves to date probably due to its mathematical and circuit-level
complexity.
This Thesis presents an overview of the CMOS weak inversion Sinh filtering
paradigm and explains how biomedical systems of low- to audio-frequency range could
benefit from it. Its dual scope is to: consolidate the theory behind the synthesis and design of
high order Sinh continuous–time filters and more importantly to confirm their micro-power
consumption and 100+ dB of DR through measured results presented for the first time.
Novel high order Sinh topologies are designed by means of a systematic
mathematical framework introduced. They employ a recently proposed CMOS Sinh
integrator comprising only p-type devices in its translinear loops. The performance of the
high order topologies is evaluated both solely and in comparison with their Log domain
counterparts. A 5th order Sinh Chebyshev low pass filter is compared head-to-head with a
corresponding and also novel Log domain class-AB topology, confirming that Sinh filters
constitute a solution of equally high DR (100+ dB) with half the capacitor area at the expense
of higher complexity and power consumption. The theoretical findings are validated by
means of measured results from an 8th order notch filter for 50/60Hz noise fabricated in a
0.35μm CMOS technology. Measured results confirm a DR of 102dB, a moderate SNR of
~60dB and 74μW power consumption from 2V power supply
Analog Reconfigurable Circuits
The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings of electronics, but the universal reconfigurable circuits called Field Programmable Analog Arrays (FPAA) have been developed over the last two decades. This paper presents the classification of analog circuit reconfiguration, examples of FPAA solutions obtained as academic projects and commercially available ones, as well as some application examples of the dynamic reconfiguration of FPAA.
Power-efficient current-mode analog circuits for highly integrated ultra low power wireless transceivers
In this thesis, current-mode low-voltage and low-power techniques have been applied to implement novel analog circuits for zero-IF receiver backend design, focusing on amplification, filtering and detection stages. The structure of the thesis follows a bottom-up scheme: basic techniques at device level for low voltage low power operation are proposed in the first place, followed by novel circuit topologies at cell level, and finally the achievement of new designs at system level.
At device level the main contribution of this work is the employment of Floating-Gate (FG) and Quasi-Floating-Gate (QFG) transistors in order to reduce the power consumption. New current-mode basic topologies are proposed at cell level: current mirrors and current conveyors. Different topologies for low-power or high performance operation are shown, being these circuits the base for the system level designs.
At system level, novel current-mode amplification, filtering and detection stages using the former mentioned basic cells are proposed. The presented current-mode filter makes use of companding techniques to achieve high dynamic range and very low power consumption with for a very wide tuning range. The amplification stage avoids gain bandwidth product achieving a constant bandwidth for different gain configurations using a non-linear active feedback network, which also makes possible to tune the bandwidth. Finally, the proposed current zero-crossing detector represents a very power efficient mixed signal detector for phase modulations. All these designs contribute to the design of very low power compact Zero-IF wireless receivers.
The proposed circuits have been fabricated using a 0.5μm double-poly n-well CMOS technology, and the corresponding measurement results are provided and analyzed to validate their operation. On top of that, theoretical analysis has been done to fully explore the potential of the resulting circuits and systems in the scenario of low-power low-voltage applications.Programa Oficial de Doctorado en TecnologÃas de las Comunicaciones (RD 1393/2007)Komunikazioen Teknologietako Doktoretza Programa Ofiziala (ED 1393/2007
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