RESCUE: Cross-Sectoral PhD Training Concept for Interdependent Reliability, Security and Quality

The recently started European Training Network (ETN) RESCUE advances scientific competences in the demanding and mutually dependent aspects of nano-electronic systems design, i.e. reliability, security and quality, as well as related electronic design automation tools. Second, it provides early-stage researchers with innovative cross-sectoral training in the involved disciplines and beyond, preparing them to face today’s and future challenges in nano-electronics design. Furthermore, they are also trained to be innovative, creative, and more important – will have an entrepreneurial mentality. The latter will help to compile ideas into products and services for economic and social benefits and creates qualified workforce and knowledge for the industry. The consortium consists of leading European research groups competent to tackle the interdependent challenges in a holistic manner, and is excellently balanced in terms of academic and industrial training and research facilities

TFT and ULSI technologies: The parallel evolution of the research and the higher education in France

This paper deals with the evolution since the early eighties of the microelectronics applied to integrated circuits and to large area electronics. The evolution in France was linked to a very strong effort of the French government (Microelectronics national plan) to improve the Higher Education in this field and to form with the knowledge and the know-how the future engineers, masters and doctors to the research and development and to the production. A way to help the growth of microelectronics companies mainly in France, but also for the world in the frame of multinational companies. More recently, a new national plan was engaged in the frame of the French Large Investment Commissariat with the goal to improve the large area technology and the integrated technologies and to be adapted to the digital society coming. Connecting objects and Internet of Things are mainly mixing the different components of the electronics and microelectronics domains [1]. After a synthetic presentation of the evolution of the two main technologies developed in research and development centers and in academic laboratories, the paper highlights the strategy developed by the French community based on the innovation [2]. The interesting point is that, if at the beginning the two domains appear independent, the evolution of the process and the fabulous evolution of the CAD tools is making closer and closer the design and fabrication approaches by combining the two technologies. For example the FDSOI (Fully Depleted Silicon on Insulator) concept was in practice existing since many years in thin film transistor technology deposited at a relatively low temperature

Runtime Hardware Reconfiguration in Wireless Sensor Networks for Condition Monitoring

The integration of miniaturized heterogeneous electronic components has enabled the deployment of tiny sensing platforms empowered by wireless connectivity known as wireless sensor networks. Thanks to an optimized duty-cycled activity, the energy consumption of these battery-powered devices can be reduced to a level where several years of operation is possible. However, the processing capability of currently available wireless sensor nodes does not scale well with the observation of phenomena requiring a high sampling resolution. The large amount of data generated by the sensors cannot be handled efficiently by low-power wireless communication protocols without a preliminary filtering of the information relevant for the application. For this purpose, energy-efficient, flexible, fast and accurate processing units are required to extract important features from the sensor data and relieve the operating system from computationally demanding tasks. Reconfigurable hardware is identified as a suitable technology to fulfill these requirements, balancing implementation flexibility with performance and energy-efficiency. While both static and dynamic power consumption of field programmable gate arrays has often been pointed out as prohibitive for very-low-power applications, recent programmable logic chips based on non-volatile memory appear as a potential solution overcoming this constraint. This thesis first verifies this assumption with the help of a modular sensor node built around a field programmable gate array based on Flash technology. Short and autonomous duty-cycled operation combined with hardware acceleration efficiently drop the energy consumption of the device in the considered context. However, Flash-based devices suffer from restrictions such as long configuration times and limited resources, which reduce their suitability for complex processing tasks. A template of a dynamically reconfigurable architecture built around coarse-grained reconfigurable function units is proposed in a second part of this work to overcome these issues. The module is conceived as an overlay of the sensor node FPGA increasing the implementation flexibility and introducing a standardized programming model. Mechanisms for virtual reconfiguration tailored for resource-constrained systems are introduced to minimize the overhead induced by this genericity. The definition of this template architecture leaves room for design space exploration and application- specific customization. Nevertheless, this aspect must be supported by appropriate design tools which facilitate and automate the generation of low-level design files. For this purpose, a software tool is introduced to graphically configure the architecture and operation of the hardware accelerator. A middleware service is further integrated into the wireless sensor network operating system to bridge the gap between the hardware and the design tools, enabling remote reprogramming and scheduling of the hardware functionality at runtime. At last, this hardware and software toolchain is applied to real-world wireless sensor network deployments in the domain of condition monitoring. This category of applications often require the complex analysis of signals in the considered range of sampling frequencies such as vibrations or electrical currents, making the proposed system ideally suited for the implementation. The flexibility of the approach is demonstrated by taking examples with heterogeneous algorithmic specifications. Different data processing tasks executed by the sensor node hardware accelerator are modified at runtime according to application requests