A robust high-efficiency cross-coupled charge pump circuit without blocking transistors

This document is the Accepted Manuscript version of the following article: Minglin Ma, Xinglong Cai, Yichuang Sun, and Nike George, ‘A robust high-efficiency cross-coupled charge pump circuit without blocking transistors’, Analog Integrated Circuits and Signal Processing, Vol. 95 (3): 395-401, June 2018. Under embargo until 16 March 2019. The final publication is available at Springer via: https://doi.org/10.1007/s10470-018-1149-xA fully integrated cross-coupled charge pump circuit with a new clock scheme has been presented in this paper. The new clock scheme ensures that all NMOS pre-charge transistors are turned off when the voltages of main clock signals are high. Notably, all PMOS transfer transistors will be turned off when the voltages of the main clock signals are low. As a result, the charge pump eliminates all of the reversion power loss and reduces the ripple voltage. The proposed charge pump has a better performance even in scenarios where the main clock signals are mismatched. The proposed charge pump circuit was simulated using spectre in the TSMC 0.18 µm CMOS process. The simulation results show that the proposed charge pump circuit has a high voltage conversion efficiency and low ripple voltage.Peer reviewe

High Efficiency Cross-Coupled Charge Pump Circuit with Four-Clock Signals

© Allerton Press, Inc. 2018A fully integrated cross-coupled charge pump circuit for boosting dc-to-dc converter applications with four-clock signals has been proposed. With the new clock scheme, this charge pump eliminates all of the reversion power loss and reduces the ripple voltage. In addition, the largest voltage differences between the terminals of all transistors do not exceed the power supply voltage for solving the gate-oxide overstress problem in the conventional charge pump circuits and enhancing the reliability. This proposed charge pump circuit does not require any extra level shifter; therefore, the power efficiency is increased. The proposed charge pump circuit has been simulated using Spectre in the TSMC 0.18 μm CMOS process. The simulation results show that the maximum voltage conversion efficiency of the new 3-stage cross-coupled circuit with an input voltage of 1.5Vis 99.8%. According to the comparison results of the conventional pump and the enhanced charge pump proposed, the output ripple voltage has been significantly reduced.Peer reviewe

Supercapacitor assisted LDO (SCALDO) techniquean extra low frequency design approach to high efficiency DC-DC converters and how it compares with the classical switched capacitor converters

Supercapacitor assisted low dropout regulators (SCALDO) were proposed as an alternative design approach to DC-DC converters, where the supercapacitor circulation frequency (switching frequency) is in the order of few Hz to few 10s of Hz, with an output stage based on a low dropout regulator stage. For converters such as 12–5V, 5–3.3V and 5–1.5V, the technique provides efficiency improvement factors of 2, 1.33 and 3 respectively, in compared to linear converters with same input-output combinations. In a 5–1.5V SCALDO regulator, using thin profile supercapacitors in the range of fractional farads to few farads, this translates to an approximate end to end efficiency of near 90%. However, there were concerns that this patented technique is merely a variation of well-known switched capacitor (charge pump) converters. This paper is aimed at providing a broad overview of the capability of SCALDO technique with generalized theory, indicating its capabilities and limitations, and comparing the practical performance with a typical switched capacitor converter of similar current capability

Ultrafast High-pressure AC Electro-osmotic Pumps for Portable Biomedical Microfluidics

This paper details the development of an integrated AC electro-osmotic (ACEO) microfluidic pump for dilute electrolytes consisting of a long serpentine microchannel lined with three dimensional (3D) stepped electrode arrays. Using low AC voltage (1 Volt rms, 1 kHz), power (5 mW) and current (3.5 mA) in water, the pump is capable of generating a 1.4 kPa head pressure, a 100-fold increase over prior ACEO pumps, and a 1.37 mm/sec effective slip velocity over the electrodes without flow reversal. The integrated ACEO pump can utilize low ionic strength solutions such as distilled water as the working solution to pump physiological strength (100 mM) biological solutions in separate microfluidic devices, with potential applications in portable or implantable biomedical microfluidic devices. As a proof-of-concept experiment, the use of the ACEO pumps for DNA hybridization in a microfluidic microarray is demonstrated

Review on the development of truly portable and in-situ capillary electrophoresis systems

Capillary electrophoresis (CE) is a technique which uses an electric field to separate a mixed sample into its constituents. Portable CE systems enable this powerful analysis technique to be used in the field. Many of the challenges for portable systems are similar to those of autonomous in-situ analysis and therefore portable systems may be considered a stepping stone towards autonomous in-situ analysis. CE is widely used for biological and chemical analysis and example applications include: water quality analysis; drug development and quality control; proteomics and DNA analysis; counter-terrorism (explosive material identification) and corrosion monitoring. The technique is often limited to laboratory use, since it requires large electric fields, sensitive detection systems and fluidic control systems. All of these place restrictions in terms of: size, weight, cost, choice of operating solutions, choice of fabrication materials, electrical power and lifetime. In this review we bring together and critique the work by researchers addressing these issues. We emphasize the importance of a holistic approach for portable and in-situ CE systems and discuss all the aspects of the design. We identify gaps in the literature which require attention for the realization of both truly portable and in-situ CE systems

Design and layout strategies for integrated frequency synthesizers with high spectral purity

Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich.This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence (funded by the DFG, German Research Foundation) respectively.Design guidelines for fractional-N phase-locked loops with a high spectral purity of the output signal are presented. Various causes for phase noise and spurious tones (spurs) in integer-N and fractional-N phase-locked loops (PLLs) are briefly described. These mechanisms include device noise, quantization noise folding, and noise coupling from charge pump (CP) and reference input buffer to the voltage-controlled oscillator (VCO) and vice versa through substrate and bondwires. Remedies are derived to mitigate the problems by using proper PLL parameters and a careful chip layout. They include a large CP current, sufficiently large transistors in the reference input buffer, linearization of the phase detector, a high speed of the programmable frequency divider, and minimization of the cross-coupling between the VCO and the other building blocks. Examples are given based on experimental PLLs in SiGe BiCMOS technologies for space communication and wireless base stations.BMBF, 03ZZ0512A, Zwanzig20 - Verbundvorhaben: fast-spot; TP1: Modularer Basisband- Prozessor mit extrem hohen Datenraten, sehr kurzen Latenzzeiten und SiGe-Analog-Frontend-IC-Fertigung bei >200 GHz Trägerfrequen

Vanadium redox flow batteries: Potentials and challenges of an emerging storage technology

open4noIn this paper an overview of Vanadium Redox Flow Battery technologies, architectures, applications and power electronic interfaces is given. These systems show promising features for energy storage in smart grid applications, where the intermittent power produced by renewable sources must meet strict load requests and economical opportunities. This paper reviews the vanadium-based technology for redox flow batteries and highlights its strengths and weaknesses, outlining the research lines that aim at taking it to full commercial success.openSpagnuolo, Giovanni, Guarnieri, Massimo; Mattavelli, Paolo; Petrone, Giovanni;Guarnieri, Massimo; Mattavelli, Paolo; Petrone, Giovanni; Spagnuolo, Giovann

A Low Power FinFET Charge Pump For Energy Harvesting Applications

Indiana University-Purdue University Indianapolis (IUPUI)With the growing popularity and use of devices under the great umbrella that is the Internet of Things (IoT), the need for devices that are smaller, faster, cheaper and require less power is at an all time high with no intentions of slowing down. This is why many current research efforts are very focused on energy harvesting. Energy harvesting is the process of storing energy from external and ambient sources and delivering a small amount of power to low power IoT devices such as wireless sensors or wearable electronics. A charge pumps is a circuit used to convert a power supply to a higher or lower voltage depending on the specific application. Charge pumps are generally seen in memory design as a verity of power supplies are required for the newer memory technologies. Charge pumps can be also be designed for low voltage operation and can convert a smaller energy harvesting voltage level output to one that may be needed for the IoT device to operate. In this work, an integrated FinFET (Field Effect Transistor) charge pump for low power energy harvesting applications is proposed. The design and analysis of this system was conducted using Cadence Virtuoso Schematic L-Editing, Analog Design Environment and Spectre Circuit Simulator tools using the 7nm FinFETs from the ASAP7 7nm PDK. The research conducted here takes advantage of some inherent characteristics that are present in FinFET technologies, including low body effects, and faster switching speeds, lower threshold voltage and lower power consumption. The lower threshold voltage of the FinFET is key to get great performance at lower supply voltages. The charge pump in this work is designed to pump a 150mV power supply, generated from an energy harvester, to a regulated 650mV, while supplying 1uA of load current, with a 20mV voltage ripple in steady state (SS) operation. At these conditions, the systems power consumption is 4.85uW and is 31.76% efficient. Under no loading conditions, the charge pump reaches SS operation in 50us, giving it the fastest rise time of the compared state of the art efforts mentioned in this work. The minimum power supply voltage for the system to function is 93mV where it gives a regulated output voltage of $25mV. FinFET technology continues to be a very popular design choice and even though it has been in production since Intel's Ivy-Bridge processor in 2012, it seems that very few efforts have been made to use the advantages of FinFETs for charge pump design. This work shows though simulation that FinFET charge pumps can match the performance of charge pumps implemented in other technologies and should be considered for low power designs such as energy harvesting