Multiple-valued logic: technology and circuit implementation

Title from PDF of title page, viewed March 1, 2023Dissertation advisors: Masud H. Chowdhury and Yugyung LeeVitaIncludes bibliographical references (pages 91-107)Dissertation (Ph.D.)--Department of Computer Science and Electrical Engineering. University of Missouri--Kansas City, 2021Computing technologies are currently based on the binary logic/number system, which is dependent on the simple on and off switching mechanism of the prevailing transistors. With the exponential increase of data processing and storage needs, there is a strong push to move to a higher radix logic/number system that can eradicate or lessen many limitations of the binary system. Anticipated saturation of Moore's law and the necessity to increase information density and processing speed in the future micro and nanoelectronic circuits and systems provide a strong background and motivation for the beyond-binary logic system. During this project, different technologies for Multiple-Valued-Logic (MVL) devices and the associated prospects and constraints are discussed. The feasibility of the MVL system in real-world applications rests on resolving two major challenges: (i) development of an efficient mathematical approach to implement the MVL logic using available technologies and (ii) availability of effective synthesis techniques. The main part of this project can be divided into two categories: (i) proposing different novel and efficient design for various logic and arithmetic circuits such as inverter, NAND, NOR, adder, multiplexer etc. (ii) proposing different fast and efficient design for various sequential and memory circuits. For the operation of the device, two of the very promising emerging technologies are used: Graphene Nanoribbon Field Effect Transistor (GNRFET) and Carbon Nano Tube Field Effect Transistor (CNTFET). A comparative analysis of the proposed designs and several state-of-the-art designs are also given in all the cases in terms of delay, total power, and power-delay-product (PDP). The simulation and analysis are performed using the H-SPICE tool with a GNRFET model available on the Nanohub website and CNTFET model available from Standford University website.Introduction -- Fundamentals and scope of multiple valued logic -- Technological aspect of multiple valued logic circuit -- Ternary logic gates using Graphene Nano Ribbon Field Effect Transistor (GNRFET) -- Ternary arithmetic circuits using Graphene Nano Ribbon Field Effect Transistor (GNRFET) -- Ternary sequential circuits using Graphene Nano Ribbon Field Effect Transistor (GNRFET) -- Ternary memory circuits using Carbon Nano Tube Field Effect Transistor (CNTFET) -- Conclusions & future wor

The 1991 3rd NASA Symposium on VLSI Design

Papers from the symposium are presented from the following sessions: (1) featured presentations 1; (2) very large scale integration (VLSI) circuit design; (3) VLSI architecture 1; (4) featured presentations 2; (5) neural networks; (6) VLSI architectures 2; (7) featured presentations 3; (8) verification 1; (9) analog design; (10) verification 2; (11) design innovations 1; (12) asynchronous design; and (13) design innovations 2

Long-Term Memory for Cognitive Architectures: A Hardware Approach Using Resistive Devices

A cognitive agent capable of reliably performing complex tasks over a long time will acquire a large store of knowledge. To interact with changing circumstances, the agent will need to quickly search and retrieve knowledge relevant to its current context. Real time knowledge search and cognitive processing like this is a challenge for conventional computers, which are not optimised for such tasks. This thesis describes a new content-addressable memory, based on resistive devices, that can perform massively parallel knowledge search in the memory array. The fundamental circuit block that supports this capability is a memory cell that closely couples comparison logic with non-volatile storage. By using resistive devices instead of transistors in both the comparison circuit and storage elements, this cell improves area density by over an order of magnitude compared to state of the art CMOS implementations. The resulting memory does not need power to maintain stored information, and is therefore well suited to cognitive agents with large long-term memories. The memory incorporates activation circuits, which bias the knowledge retrieval process according to past memory access patterns. This is achieved by approximating the widely used base-level activation function using resistive devices to store, maintain and compare activation values. By distributing an instance of this circuit to every row in memory, the activation for all memory objects can be updated in parallel. A test using the word sense disambiguation task shows this circuit-based activation model only incurs a small loss in accuracy compared to exact base-level calculations. A variation of spreading activation can also be achieved in-memory. Memory objects are encoded with high-dimensional vectors that create association between correlated representations. By storing these high-dimensional vectors in the new content-addressable memory, activation can be spread to related objects during search operations. The new memory is scalable, power and area efficient, and performs operations in parallel that are infeasible in real-time for a sequential processor with a conventional memory hierarchy.Thesis (Ph.D.) -- University of Adelaide, School of Electrical and Electronic Engineering, 201

Proceedings of the NASA Conference on Space Telerobotics, volume 5

Papers presented at the NASA Conference on Space Telerobotics are compiled. The theme of the conference was man-machine collaboration in space. The conference provided a forum for researchers and engineers to exchange ideas on the research and development required for the application of telerobotics technology to the space systems planned for the 1990's and beyond. Volume 5 contains papers related to the following subject areas: robot arm modeling and control, special topics in telerobotics, telerobotic space operations, manipulator control, flight experiment concepts, manipulator coordination, issues in artificial intelligence systems, and research activities at the Johnson Space Center