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Millimeter-Wave Gan Mmic Integration with Additive Manufacturing
This thesis addresses the analysis, design, integration and test of microwave and millimeter-wave monolithic microwave integrated circuits (MMIC or MMICs). Recent and ongoing progress in semiconductor device fabrication and MMIC processing technology has pushed the upper limit in MMIC frequencies from millimeter-wave (30 - 300 GHz) to terahertz (300 - 3000 GHz). MMIC components operating at these frequencies will be used to improve the sensitivity and performance of radiometers, receivers for communication systems, passive remote sensing systems, transceivers for radar instruments and radio astronomy systems. However, a serious hurdle in the utilization of these MMIC components, and a main topic presented in this thesis, is the development and reliable fabrication of practical packaging techniques.
The focus of this thesis is the investigation of first, the design and analysis of microwave and millimeter-wave GaN MMICs and second, the integration of those MMICs into usable waveguide components. The analysis, design and testing of various X-band (8-12 GHz) thru H-band (170-260 GHz) GaN MMIC power amplifier (PA or PAs), including a V-band (40-75 GHz) voltage controlled oscillator, is the majority of this work. Several PA designs utilizing high-efficiency techniques are analyzed, designed and tested. These examples include a 2nd harmonic injection amplifier, a Class-E amplifier fabricated with a GaN-on-SiC 300 GHz fT process, and an example of the applicability of supply-modulation with a Doherty power amplifier, all operating at 10 GHz. Two H-band GaN MMIC PAs are designed, one with integrated CPW-to-waveguide transitions for integration. The analysis of PA stability is especially important for wideband, high-fT devices and a new way of analyzing stability is explored and experimentally validated.
Last, the challenges of integrating MMICs operating at millimeter-wave frequencies are discussed and assemblies using additive and traditional manufacturing are demonstrated.</p
Multikilowatt transmitter study for space communications satellites. Volume 1 - Summary report, phase 1
High power transmitters with potential applicability to satellite television broadcastin
Microwave Characteristics of an Independently Biased 3-stack InGaP/GaAs HBT Configuration
This paper investigates various important microwave characteristics of an independently biased 3-stack InGaP/GaAs heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) chip at both small-signal and large-signal operation. By taking the advantage of the independently biased functionality, bias condition for individual transistor can be adjusted flexibly, resulting in the ability of independent control for both small-signal and large-signal performances. It was found that at small-signal operation stability and isolation characteristics of the proposed configuration can be significantly improved by controlling bias condition of the second-stage and the third-stage transistors while at large-signal operation its linearity and power gain can be improved through controlling the bias condition of the first-stage and the third-stage transistors. To demonstrate the benefits of using such an independently biased configuration, a measured optimum large-signal performance at an operation frequency of 1.6 GHz under an optimum bias condition for the high gain, low distortion were obtained as: PAE = 23.5 %, Pout = 12 dBm; Gain = 32.6 dB at IMD3 = -35 dBc. Moreover, to demonstrate the superior advantage of the proposed configuration, its small-signal and large-signal performance were also compared to that of a single stage common-emitter, a conventional 2-stack, an independently biased 2-stack and a conventional 3-stack configuration. The compared results showed that the independently biased 3-stack is the best candidate among the configurations for various wireless communications applications
An Octave-Range, Watt-Level, Fully-Integrated CMOS Switching Power Mixer Array for Linearization and Back-Off-Efficiency Improvement
The power mixer array is presented as a novel power generation approach for non-constant envelope signals. It comprises several power mixer units that are dynamically turned on and off to improve the linearity and back-off efficiency. At the circuit level, the power mixer unit can operate as a switching amplifier to achieve high peak power efficiency. Additional circuit level linearization and back-off efficiency improvement techniques are also proposed. To demonstrate the feasibility of this idea, a fully-integrated octave-range CMOS power mixer array is implemented in a 130 nm CMOS process. It is operational between 1.2 GHz and 2.4 GHz and can generate an output power of +31.3 dBm into an external 50 Ω load with a PAE of 42% and a gain compression of only 0.4 dB at 1.8 GHz. It achieves a PAE of 25%, at an average output power of +26.4 dBm, and an EVM of 4.6% with a non-constant-envelope 16 QAM signal. It can also produce arbitrary signal levels down to -70 dBm of output power with the 16 QAM-modulated signal without any RF gain control circuit
A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS
© 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.A fully-integrated reconfigurable dual-band (760-960 MHz and 2.4-2.5 GHz) transceiver (TRX) for short range wireless communications is presented. The TRX consists of two individually-optimized RF front-ends for each band and one shared power-scalable analog baseband. The sub-GHz receiver has achieved the maximum 75 dBc 3rd-order harmonic rejection ratio (HRR3) by inserting a Q-enhanced notch filtering RF amplifier (RFA). In 2.4 GHz band, a single-ended-to-differential RFA with gain/phase imbalance compensation is proposed in the receiver. A ΣΔ fractional-N PLL frequency synthesizer with two switchable Class-C VCOs is employed to provide the LOs. Moreover, the integrated multi-mode PAs achieve the output P1dB (OP1dB) of 16.3 dBm and 14.1 dBm with both 25% PAE for sub-GHz and 2.4 GHz bands, respectively. A power-control loop is proposed to detect the input signal PAPR in real-time and flexibly reconfigure the PA's operation modes to enhance the back-off efficiency. With this proposed technique, the PAE of the sub-GHz PA is improved by x3.24 and x1.41 at 9 dB and 3 dB back-off powers, respectively, and the PAE of the 2.4 GHz PA is improved by x2.17 at 6 dB back-off power. The presented transceiver has achieved comparable or even better performance in terms of noise figure, HRR, OP1dB and power efficiency compared with the state-of-the-art.Peer reviewe
High efficiency power amplifiers for modern mobile communications: The load-modulation approach
Modern mobile communication signals require power amplifiers able to maintain very high efficiency in a wide range of output power levels, which is a major issue for classical power amplifier architectures. Following the load-modulation approach, efficiency enhancement is achieved by dynamically changing the amplifier load impedance as a function of the input power. In this paper, a review of the widely-adopted Doherty power amplifier and of the other load-modulation efficiency enhancement techniques is presented. The main theoretical aspects behind each method are introduced, and the most relevant practical implementations available in recent literature are reported and discussed
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