Multilevel Converters: An Enabling Technology for High-Power Applications

| Multilevel converters are considered today as the state-of-the-art power-conversion systems for high-power and power-quality demanding applications. This paper presents a tutorial on this technology, covering the operating principle and the different power circuit topologies, modulation methods, technical issues and industry applications. Special attention is given to established technology already found in industry with more in-depth and self-contained information, while recent advances and state-of-the-art contributions are addressed with useful references. This paper serves as an introduction to the subject for the not-familiarized reader, as well as an update or reference for academics and practicing engineers working in the field of industrial and power electronics.Ministerio de Ciencia y Tecnología DPI2001-3089Ministerio de Eduación y Ciencia d TEC2006-0386

Low-Power Energy Efficient Circuit Techniques for Small IoT Systems

Although the improvement in circuit speed has been limited in recent years, there has been increased focus on the internet of things (IoT) as technology scaling has decreased circuit size, power usage and cost. This trend has led to the development of many small sensor systems with affordable costs and diverse functions, offering people convenient connection with and control over their surroundings. This dissertation discusses the major challenges and their solutions in realizing small IoT systems, focusing on non-digital blocks, such as power converters and analog sensing blocks, which have difficulty in following the traditional scaling trends of digital circuits. To accommodate the limited energy storage and harvesting capacity of small IoT systems, this dissertation presents an energy harvester and voltage regulators with low quiescent power and good efficiency in ultra-low power ranges. Switched-capacitor-based converters with wide-range energy-efficient voltage-controlled oscillators assisted by power-efficient self-oscillating voltage doublers and new cascaded converter topologies for more conversion ratio configurability achieve efficient power conversion down to several nanowatts. To further improve the power efficiency of these systems, analog circuits essential to most wireless IoT systems are also discussed and improved. A capacitance-to-digital sensor interface and a clocked comparator design are improved by their digital-like implementation and operation in phase and frequency domain. Thanks to the removal of large passive elements and complex analog blocks, both designs achieve excellent area reduction while maintaining state-of-art energy efficiencies. Finally, a technique for removing dynamic voltage and temperature variations is presented as smaller circuits in advanced technologies are more vulnerable to these variations. A 2-D simultaneous feedback control using an on-chip oven control locks the supply voltage and temperature of a small on-chip domain and protects circuits in this locked domain from external voltage and temperature changes, demonstrating 0.0066 V/V and 0.013 °C/°C sensitivities to external changes. Simple digital implementation of the sensors and most parts of the control loops allows robust operation within wide voltage and temperature ranges.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/138743/1/wanyeong_1.pd

Integrated high-voltage switched-capacitor DC-DC converters

The focus of this work is on the integrated circuit (IC) level integration of high-voltage switched-capacitor (SC) converters with the goal of fully integrated power management solutions for system-on-chip (SoC) and system-in-pagage (SiP) applications. The full integration of SC converters provides a low cost and compact power supply solution for modern electronics. Currently, there are almost no fully integrated SC converters with input voltages above 5 V. The purpose of this work is to provide solutions for higher input voltages. The increasing challenges of a compact and efficient power supply on the chip are addressed. High-voltage rated components and the increased losses caused by parasitics not only reduce power density but also efficiency. Loss mechanisms in high-voltage SC converters are investigated resulting in an optimized model for high-voltage SC converters. The model developed allows an appropriate comparison of different semiconductor technologies and converter topologies. Methods and design proposals for loss reduction are presented. Control of power switches with their supporting circuits is a further challenge for high-voltage SC converters. The aim of this work is to develop fully integrated SC converters with a wide input voltage range. Different topologies and concepts are investigated. The implemented fully integrated SC converter has an input voltage range of 2 V to 13 V. This is twice the range of existing converters. This is achieved by an implemented buck and boost mode as well as 17 conversion ratios. Experimental results show a peak efficiency of 81.5%. This is the highest published peak efficiency for fully integrated SC converters with an input voltage > 5V. With the help of the model developed in this work, a three-phase SC converter topology for input voltages up to 60 V is derived and then investigated and discussed. Another focus of this work is on the power supply of sensor nodes and smart home applications with low-power consumption. Highly integrated micro power supplies that operate directly from mains voltage are particularly suitable for these applications. The micro power supply proposed in this work utilizes the high-voltage SC converter developed. The output power is 14 times higher and the power density eleven times higher than prior work. Since plenty of power switches are built into modern multi-ratio SC converters, the switch control circuits must be optimized with regard to low-power consumption and area requirements. In this work, different level shifter concepts are investigated and a low-power high-voltage level shifter for 50 V applications based on a capacitive level shifter is introduced. The level shifter developed exceeds the state of the art by a factor of more than eleven with a power consumption of 2.1pJ per transition. A propagation delay of 1.45 ns is achieved. The presented high-voltage level shifter is the first level shifter for 50 V applications with a propagation delay below 2 ns and power consumption below 20pJ per transition. Compared to the state of the art, the figure of merit is significantly improved by a factor of two. Furthermore, various charge pump concepts are investigated and evaluated within the context of this work. The charge pump, optimized in this work, improves the state of the art by a factor of 1.6 in terms of efficiency. Bidirectional switches must be implemented at certain locations within the power stage to prevent reverse conduction. The topology of a bidirectional switch developed in this work reduces the dynamic switching losses by 70% and the area consumption including the required charge pumps by up to 65% compared to the state of the art. These improvements make it possible to control the power switches in a fast and efficient way. Index terms — integrated power management, high input voltage, multi-ratio SC converter, level shifter, bidirectional switch, micro power supplyDer Schwerpunkt dieser Arbeit liegt auf der Erforschung von Switched-Capacitor (SC) Spannungswandler für höhere Eingangsspannungen. Ziel der Arbeit ist es Lösungen für ein voll auf dem Halbleiterchip integriertes Power Management anzubieten um System on Chip (SoC) und System in Package (SiP) zu ermöglichen. Die vollständige Integration von SC Spannungswandlern bietet eine kostengünstige und kompakte Spannungsversorgungslösung für moderne Elektronik. Der kontinuierliche Trend hin zu immer kompakterer Elektronik und hin zu höheren Versorgungsspannungen wird in dieser Arbeit adressiert. Aktuell gibt es sehr wenige voll integrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Die mit steigender Spannung zunehmenden Herausforderungen an eine kompakte und effiziente Spannungsversorgung auf dem Chip werden in dieser Arbeit untersucht. Die höhere Spannungsfestigkeit der verwendeten Komponenten korreliert mit erhöhten Verlusten und erhöhtem Flächenverbrauch, welche sich negativ auf den Wirkungsgrad und die Leistungsdichte von SC Spannungswandlern auswirkt. Bestandteil dieser Arbeit ist die Untersuchung dieser Verlustmechanismen und die Entwicklung eines Modells, welches speziell für höhere Spannungen optimiert wurde. Das vorgestellte Modell ermöglicht zum einen die optimale Dimensionierung der Spannungswandler und zum anderen faire Vergleichsmöglichkeiten zwischen verschiedenen SC Spannungswandler Architekturen und Halbleitertechnologien. Demnach haben sowohl die gewählte Architektur und Halbleitertechnologie als auch die Kombination aus gewählter Architektur und Technologie erheblichen Einfluss auf die Leistungsfähigkeit der Spannungswandler. Ziel dieser Arbeit ist die Vollintegration eines SC Spannungswandlers mit einem weiten und hohen Eingangsspannungsbereich zu entwickeln. Dazu wurden verschiedene Schaltungsarchitekturen und Konzepte untersucht. Der vorgestellte vollintegrierte SC Spannungswandler weist einen Eingangsspannungsbereich von 2 V bis 13 V auf. Dies ist eine Verdopplung im Vergleich zum Stand der Technik. Dies wird durch einen implementierten Auf- und Abwärtswandler-Betriebsmodus sowie 17 Übersetzungsverhältnisse erreicht. Experimentelle Ergebnisse zeigen einen Spitzenwirkungsgrad von 81.5%. Dies ist der höchste veröffentlichte Spitzenwirkungsgrad für vollintegrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Mit Hilfe des in dieser Arbeit entwickelten Modells wird eine dreiphasige SC Spannungswandler Architektur für Eingangsspannungen bis zu 60 V entwickelt und anschließend analysiert und diskutiert. Ein weiterer Schwerpunkt dieser Arbeit adressiert die kompakte Spannungsversorgung von Sensorknoten mit geringem Stromverbrauch, für Anwendungen wie Smart Home und Internet der Dinge (IoT). Für diese Anwendungen eignen sich besonders gut hochintegrierte Mikro-Netzteile, welche direkt mit dem 230VRMS-Hausnetz (bzw. 110VRMS) betrieben werden können. Das in dieser Arbeit vorgestellte Mikro-Netzteil nutzt einen in dieser Arbeit entwickelten SC Spannungswandler für hohe Eingangsspannungen. Die damit erzielte Ausgangsleistung ist 14-mal größer im Vergleich zum Stand der Technik. In SC Spannungswandlern für hohe Spannungen werden viele Leistungsschalter benötigt, deshalb muss bei der Schalteransteuerung besonders auf einen geringen Leistungsverbrauch und Flächenbedarf der benötigten Schaltungsblöcke geachtet werden. Gegenstand dieser Arbeit ist sowohl die Analyse verschiedener Konzepte für Pegelumsetzer, als auch die Entwicklung eines stromsparenden Pegelumsetzers für 50 V-Anwendungen. Mit einer Leistungsaufnahme von 2.1pJ pro Signalübergang reduziert der entwickelte Pegelumsetzer mit kapazitiver Kopplung um mehr als elfmal die Leistungsaufnahme im Vergleich zum Stand der Technik. Die erreichte Laufzeitverzögerung beträgt 1.45 ns. Damit erzielt der vorgestellte Hochspannungs-Pegelumsetzer als erster Pegelumsetzer für 50 V-Anwendungen eine Laufzeitverzögerung unter 2 ns und eine Leistungsaufnahme unter 20pJ pro Signalwechsel. Im Vergleich zum Stand der Technik wird die Leistungskennzahl um den Faktor zwei deutlich verbessert. Darüber hinaus werden im Rahmen dieser Arbeiten verschiedene Ladungspumpenkonzepte untersucht und bewertet. Die in dieser Arbeit optimierte Ladungspumpe verbessert den Stand der Technik um den Faktor 1.6 in Bezug auf den Wirkungsgrad. Die in dieser Arbeit entwickelte Schaltungsarchitektur eines bidirektionalen Schalters reduziert die dynamischen Schaltverluste um 70% und den benötigten Flächenbedarf inklusive der benötigten Ladungspumpe um bis zu 65% gegenüber dem Stand der Technik. Diese Verbesserungen ermöglichen es, die Leistungsschalter schnell und effizient anzusteuern. Schlagworte — Integriertes Powermanagement, hohe Eingangsspannung, Multi-Ratio SC Spannungswan- dler, Pegelumsetzer, bidirektionaler Schalter, Mikro-Netztei

Review of dc-dc converters for multi-terminal HVDC transmission networks

This study presents a comprehensive review of high-power dc-dc converters for high-voltage direct current (HVDC) transmission systems, with emphasis on the most promising topologies from established and emerging dc-dc converters. In addition, it highlights the key challenges of dc-dc converter scalability to HVDC applications, and narrows down the desired features for high-voltage dc-dc converters, considering both device and system perspectives. Attributes and limitations of each dc-dc converter considered in this study are explained in detail and supported by time-domain simulations. It is found that the front-to-front quasi-two-level operated modular multilevel converter, transition arm modular converter and controlled transition bridge converter offer the best solutions for high-voltage dc-dc converters that do not compromise galvanic isolation and prevention of dc fault propagation within the dc network. Apart from dc fault response, the MMC dc auto transformer and the transformerless hybrid cascaded two-level converter offer the most efficient solutions for tapping and dc voltage matching of multi-terminal HVDC networks

Evaluation and implementation of a 5-level hybrid DC-DC converter

In this work, a hybrid voltage regulator topology is analyzed, implemented, and evaluated. The common topologies of DC-DC converters have proven to be lacking in some aspects, such as integrability for buck converters, or maximum efficiency for switched-capacitor regulators. The hybrid topology tackles these shortcomings by combining the advantages of switched-capacitor and inductor-based voltage regulators. A 5-level buck converter is evaluated, implemented, and compared to other converter implementations using the same components. The 5-Level Buck converter can achieve 5 different levels, allowing it to cover 4 operation regions, each between 2 levels. Accordingly, it covers a wide range of output voltages. By reducing the voltage difference at the inductor input, the 5-level buck converter can use smaller inductor compared to both 3-level and conventional buck converters which makes it cheaper, smaller in size, and much more efficient. Simulations show proper functionality of the 5-Level topology, while putting restrictions on the inductor size, efficiency, and component footprint (or total converter area). A test PCB is implemented for verification of the functionality and experimental measurements show that for the same switching frequency and inductor size, the 5-level buck converter achieves up to 15% efficiency improvement over a conventional buck converter and a 3-level buck converter at certain output voltage ranges. Peak efficiency of 94% has been achieved by the 5-Level hybrid converter, which includes all external switching and conduction losses. The proposed hybrid topology proved to yield high conversion efficiency even in the face of component size limitations, which indicates potential benefit in using multilevel converters for several off-chip as well as on-chip applications

An overview of HVDC technology

There is a growing use of High Voltage Direct Current (HVDC) globally due to the many advantages of Direct Current (DC) transmission systems over Alternating Current (AC) transmission, including enabling transmission over long distances, higher transmission capacity and efficiency. Moreover, HVDC systems can be a great enabler in the transition to a low carbon electrical power system which is an important objective in today’s society. The objectives of the paper are to give a comprehensive overview of HVDC technology, its development, and present status, and to discuss its salient features, limitations and applications.</jats:p

A Family of Interleaved High Step-Up DC-DC Converters by Integrating a Voltage Multiplier and an Active Clamp Circuits

A family of interleaved current-fed high step-up dc-dc converters are introduced and analyzed here by combining a voltage multiplier (VM) and an active clamp circuit for high-voltage high-power applications. Low input currents and output voltages ripples values and high voltage-gains characteristics of these converters make them suitable for lots of dc-dc applications. All power devices operate entirely under soft switching conditions, even when wide load and input voltage variations are applied. Thus, they can be designed at high switching frequencies to reduce passive components sizes to achieve high-power density, one of the main targets of the power electronics researches. Also, their input and output ports common ground simplifies the gate-drives and control circuits. To verify the given analyses and simulations, a 120-320 V to 1 kV, 50-1300 W three-stage two-leg prototype converter has been implemented at 100 kHz. Based on the experimental results, maximum efficiency of 96.5% is achieved.Comment: 14 pages, 15 figure

High-Performance Bioinstrumentation for Real-Time Neuroelectrochemical Traumatic Brain Injury Monitoring

Traumatic brain injury (TBI) has been identified as an important cause of death and severe disability in all age groups and particularly in children and young adults. Central to TBIs devastation is a delayed secondary injury that occurs in 30–40% of TBI patients each year, while they are in the hospital Intensive Care Unit (ICU). Secondary injuries reduce survival rate after TBI and usually occur within 7 days post-injury. State-of-art monitoring of secondary brain injuries benefits from the acquisition of high-quality and time-aligned electrical data i.e., ElectroCorticoGraphy (ECoG) recorded by means of strip electrodes placed on the brains surface, and neurochemical data obtained via rapid sampling microdialysis and microfluidics-based biosensors measuring brain tissue levels of glucose, lactate and potassium. This article progresses the field of multi-modal monitoring of the injured human brain by presenting the design and realization of a new, compact, medical-grade amperometry, potentiometry and ECoG recording bioinstrumentation. Our combined TBI instrument enables the high-precision, real-time neuroelectrochemical monitoring of TBI patients, who have undergone craniotomy neurosurgery and are treated sedated in the ICU. Electrical and neurochemical test measurements are presented, confirming the high-performance of the reported TBI bioinstrumentation

An Input Power-Aware Maximum Efficiency Tracking Technique for Energy Harvesting in IoT Applications

The Internet of Things (IoT) enables intelligent monitoring and management in many applications such as industrial and biomedical systems as well as environmental and infrastructure monitoring. As a result, IoT requires billions of wireless sensor network (WSN) nodes equipped with a microcontroller and transceiver. As many of these WSN nodes are off-grid and small-sized, their limited-capacity batteries need periodic replacement. To mitigate the high costs and challenges of these battery replacements, energy harvesting from ambient sources is vital to achieve energy-autonomous operation. Energy harvesting for WSNs is challenging because the available energy varies significantly with ambient conditions and in many applications, energy must be harvested from ultra-low power levels. To tackle these stringent power constraints, this dissertation proposes a discontinuous charging technique for switched-capacitor converters that improves the power conversion efficiency (PCE) at low input power levels and extends the input power harvesting range at which high PCE is achievable. Discontinuous charging delivers current to energy storage only during clock non-overlap time. This enables tuning of the output current to minimize converter losses based on the available input power. Based on this fundamental result, an input power-aware, two-dimensional efficiency tracking technique for WSNs is presented. In addition to conventional switching frequency control, clock nonoverlap time control is introduced to adaptively optimize the power conversion efficiency according to the sensed ambient power levels. The proposed technique is designed and simulated in 90nm CMOS with post-layout extraction. Under the same input and output conditions, the proposed system maintains at least 45% PCE at 4μW input power, as opposed to a conventional continuous system which requires at least 18.7μW to maintain the same PCE. In this technique, the input power harvesting range is extended by 1.5x. The technique is applied to a WSN implementation utilizing the IEEE 802.15.4- compatible GreenNet communications protocol for industrial and wearable applications. This allows the node to meet specifications and achieve energy autonomy when deployed in harsher environments where the input power is 49% lower than what is required for conventional operation