82 research outputs found

    Polarization based digital optical representation, gates, and processor

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    A complete all-optical-processing polarization-based binary-logic system, by which any logic gate or processor could be implemented, was proposed. Following the new polarization-based representation, a new Orthoparallel processing technique that allows for the creation of all-optical-processing gates that produce a unique output once in a truth table, was developed. This representation allows for the implementation of all basic 16 logic gates, including the NAND and NOR gates that can be used independently to represent any Boolean expression or function. In addition, the concept of a generalized gate is presented, which opens the door for reconfigurable optical processors and programmable optical logic gates. The gates can be cascaded, where the information is always on the laser beam. The polarization of the beam, and not its intensity, carries the information. The new methodology allows for the creation of multiple-input-multiple-output processors that implement, by itself, any Boolean function, such as specialized or non-specialized microprocessors. The Rail Road (RR) architecture for polarization optical processors (POP) is presented. All the control inputs are applied simultaneously, leading to a single time lag, which leads to a very-fast and glitch-immune POP. A simple and easy-to-follow step-by-step design algorithm is provided for the POP, and design reduction methodologies are discussed. The algorithm lends itself systematically to software programming and computer-assisted design. A completely passive optical switch was also proposed. The switch is used to design completely passive optical gates, including the NAND gate, with their operational speeds only bound by the input beams prorogation delay. The design is used to demonstrate various circuits including the RS latch. Experimental data is reported for the NAND and the Universal gate operating with different functionality. A minute error is recorded in different cases, which can be easily eliminated by a more dedicated manufacturing process. Finally, some field applications are discussed and a comparison between all proposed systems and the current semiconductor devices is conducted based on multiple factors, including, speed, lag, and heat generation.PhDCommittee Chair: Dr. Ali Adibi; Committee Member: Christopher F Barnes; Committee Member: Dr. Hao-Min Zhou; Committee Member: Dr. John Buck; Committee Member: Dr. W. Russell Calle

    Survey of FPGA applications in the period 2000 – 2015 (Technical Report)

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    Romoth J, Porrmann M, Rückert U. Survey of FPGA applications in the period 2000 – 2015 (Technical Report).; 2017.Since their introduction, FPGAs can be seen in more and more different fields of applications. The key advantage is the combination of software-like flexibility with the performance otherwise common to hardware. Nevertheless, every application field introduces special requirements to the used computational architecture. This paper provides an overview of the different topics FPGAs have been used for in the last 15 years of research and why they have been chosen over other processing units like e.g. CPUs

    A system-on-chip microwave photonic processor solves dynamic RF interference in real time with picosecond latency

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    Radio-frequency interference is a growing concern as wireless technology advances, with potentially life-threatening consequences like interference between radar altimeters and 5G cellular networks. Mobile transceivers mix signals with varying ratios over time, posing challenges for conventional digital signal processing (DSP) due to its high latency. These challenges will worsen as future wireless technologies adopt higher carrier frequencies and data rates. However, conventional DSPs, already on the brink of their clock frequency limit, are expected to offer only marginal speed advancements. This paper introduces a photonic processor to address dynamic interference through blind source separation (BSS). Our system-on-chip processor employs a fully integrated photonic signal pathway in the analogue domain, enabling rapid demixing of received mixtures and recovering the signal-of-interest in under 15 picoseconds. This reduction in latency surpasses electronic counterparts by more than three orders of magnitude. To complement the photonic processor, electronic peripherals based on field-programmable gate array (FPGA) assess the effectiveness of demixing and continuously update demixing weights at a rate of up to 305 Hz. This compact setup features precise dithering weight control, impedance-controlled circuit board and optical fibre packaging, suitable for handheld and mobile scenarios. We experimentally demonstrate the processor's ability to suppress transmission errors and maintain signal-to-noise ratios in two scenarios, radar altimeters and mobile communications. This work pioneers the real-time adaptability of integrated silicon photonics, enabling online learning and weight adjustments, and showcasing practical operational applications for photonic processing

    Optical investigations of nanostructured oxides and semiconductors

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    This work is motivated by the prospect of building a quantum computer: a device that would allow physicists to explore quantum mechanics more deeply, and allow everyone else to keep their credit card numbers safe on the internet. In this thesis we explore materials that are relevant to a proposed quantum computer architecture.Systems with a ferroelectric to paraelectric transition in the vicinity of room temperature areuseful for devices. Adjusting the ferroelectric transition temperature is traditionally accomplished by chemical substitution, as in barium strontium titanate. We investigate strained-strontium titanate, which is ferroelectric at room-temperature, and a composite material of barium strontium titanate and magnesium oxide.We present optical techniques to measure electron spin dynamics with GHz dynamical bandwidth,transform-limited spectral selectivity, and phase-sensitive detection. We demonstrate the technique with a measurement of GHz-spin precession in n-GaAs. We also describe our efforts to measure single quantum dots optically.Nanoscale devices with photonic properties have been the subject of intense research over the past decade. Potential nanophotonic applications include communications, polarization-sensitive detectors, and solar power generation. Here we show photosensitivity of a nanoscale detectorwritten at the interface between two oxides

    Design of large polyphase filters in the Quadratic Residue Number System

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    An automated targeting mechanism with free space optical communication functionality for optomechatronic applications

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    This thesis outlines the development of an agile, reliable and precise targeting mechanism complete with free space optical communication (FSOC) capabilities for employment in optomechatronic applications. To construct the complex mechanism, insight into existing technologies was required. These are inclusive to actuator design, control methodology, programming architecture, object recognition and localization and optical communication. Focusing on each component individually resulted in a variety of novel systems, commencing with the creation of a fast (1.3 ms⁻¹), accurate (micron range) voice coil actuator (VCA). The design, employing a planar, compact composition, with the inclusion of precision position feedback and smooth guidance fulfills size, weight and power (SWaP) characteristics required by many optomechatronic mechanisms. Arranging the VCAs in a parallel nature promoted the use of a parallel orientation manipulator (POM) as the foundation of the targeting structure. Motion control was achieved by adopting a cascade PID-PID control methodology in hardware, resulting in average settling times of 23 ms. In the pursuit of quick and dependable computation, a custom printed circuit board (PCB) containing a field programmable gate array (FPGA), microcontroller and image sensing technology were developed. Subsequently, hardware-based object isolation and parameter identification algorithms were constructed. Furthermore, by integrating these techniques with the dynamic performance of the POM, mathematical equations were generated to allow the targeting of an object in real-time with update rates of 70 ms. Finally, a FSOC architecture utilizing beam splitter technology was constructed and integrated into the targeting device. Thus, producing a system capable of automatically targeting an infrared (IR) light source while simultaneously receiving wireless optical communication achieving ranges beyond 30 feet, at rates of 1 Mbits per second

    Temperature aware power optimization for multicore floating-point units

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    Remote Sensing Data Compression

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    A huge amount of data is acquired nowadays by different remote sensing systems installed on satellites, aircrafts, and UAV. The acquired data then have to be transferred to image processing centres, stored and/or delivered to customers. In restricted scenarios, data compression is strongly desired or necessary. A wide diversity of coding methods can be used, depending on the requirements and their priority. In addition, the types and properties of images differ a lot, thus, practical implementation aspects have to be taken into account. The Special Issue paper collection taken as basis of this book touches on all of the aforementioned items to some degree, giving the reader an opportunity to learn about recent developments and research directions in the field of image compression. In particular, lossless and near-lossless compression of multi- and hyperspectral images still remains current, since such images constitute data arrays that are of extremely large size with rich information that can be retrieved from them for various applications. Another important aspect is the impact of lossless compression on image classification and segmentation, where a reasonable compromise between the characteristics of compression and the final tasks of data processing has to be achieved. The problems of data transition from UAV-based acquisition platforms, as well as the use of FPGA and neural networks, have become very important. Finally, attempts to apply compressive sensing approaches in remote sensing image processing with positive outcomes are observed. We hope that readers will find our book useful and interestin

    Large Scale Computing and Storage Requirements for Basic Energy Sciences Research

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    The National Energy Research Scientific Computing Center (NERSC) is the leading scientific computing facility supporting research within the Department of Energy's Office of Science. NERSC provides high-performance computing (HPC) resources to approximately 4,000 researchers working on about 400 projects. In addition to hosting large-scale computing facilities, NERSC provides the support and expertise scientists need to effectively and efficiently use HPC systems. In February 2010, NERSC, DOE's Office of Advanced Scientific Computing Research (ASCR) and DOE's Office of Basic Energy Sciences (BES) held a workshop to characterize HPC requirements for BES research through 2013. The workshop was part of NERSC's legacy of anticipating users future needs and deploying the necessary resources to meet these demands. Workshop participants reached a consensus on several key findings, in addition to achieving the workshop's goal of collecting and characterizing computing requirements. The key requirements for scientists conducting research in BES are: (1) Larger allocations of computational resources; (2) Continued support for standard application software packages; (3) Adequate job turnaround time and throughput; and (4) Guidance and support for using future computer architectures. This report expands upon these key points and presents others. Several 'case studies' are included as significant representative samples of the needs of science teams within BES. Research teams scientific goals, computational methods of solution, current and 2013 computing requirements, and special software and support needs are summarized in these case studies. Also included are researchers strategies for computing in the highly parallel, 'multi-core' environment that is expected to dominate HPC architectures over the next few years. NERSC has strategic plans and initiatives already underway that address key workshop findings. This report includes a brief summary of those relevant to issues raised by researchers at the workshop
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