Scalable EEG seizure detection on an ultra low power multi-core architecture

none4siEnergy efficient processing architectures represent key elements for wearable and implantable medical devices. Signal processing of neural data is a challenge in new designs of Brain Machine Interfaces (BMI). A highly efficient multi-core platform, designed for ultra low power processing allows the execution of complex algorithms complying with real time requirements. This paper describes the implementation and optimization of a seizure detection algorithm on a multi-core digital integrated circuit designed for energy efficient applications. The proposed architecture is able to implement ultra low power parallel processing seizure detection on 23 electrodes within a power budget of 1 mW, outperforming implementations on commercial MCUs by up to 100 times in terms of performance and up to 80 times in terms of energy efficiency still providing high versatility and scalability, opening the way to the development of efficient implantable and wearable smart systems.openBenatti, S.; Montagna, F.; Rossi, D.; Benini, L.Benatti, S.; Montagna, F.; Rossi, D.; Benini, L

Guest Editorial: Sensor Informatics for Managing Mental Health

The papers in this special section focus on the topic of sensor informatics for mental health applications. The papers provide novel insights on advances in detection, sensing, analysis, and modeling of central and/or autonomic correlates useful in psychophysiological states assessment

Implantable Micro-Device for Epilepsy Seizure Detection and Subsequent Treatment

RÉSUMÉ L’émergence des micro-dispositifs implantables est une voie prometteuse pour le traitement de troubles neurologiques. Ces systèmes biomédicaux ont été exploités comme traitements non-conventionnels sur des patients chez qui les remèdes habituels sont inefficaces. Les récents progrès qui ont été faits sur les interfaces neuronales directes ont permis aux chercheurs d’analyser l’activité EEG intracérébrale (icEEG) en temps réel pour des fins de traitements. Cette thèse présente un dispositif implantable à base de microsystèmes pouvant capter efficacement des signaux neuronaux, détecter des crises d’épilepsie et y apporter un traitement afin de l’arrêter. Les contributions principales présentées ici ont été rapportées dans cinq articles scientifiques, publiés ou acceptés pour publication dans les revues IEEE, et plusieurs autres tels que «Low Power Electronics» et «Emerging Technologies in Computing». Le microsystème proposé inclus un circuit intégré (CI) à faible consommation énergétique permettant la détection de crises d’épilepsie en temps réel. Cet CI comporte une pré-amplification initiale et un détecteur de crises d’épilepsie. Le pré-amplificateur est constitué d’une nouvelle topologie de stabilisateur d’hacheur réduisant le bruit et la puissance dissipée. Les CI fabriqués ont été testés sur des enregistrements d’icEEG provenant de sept patients épileptiques réfractaires au traitement antiépileptique. Le délai moyen de la détection d’une crise est de 13,5 secondes, soit avant le début des manifestations cliniques évidentes. La consommation totale d’énergie mesurée de cette puce est de 51 μW. Un neurostimulateur à boucle fermée (NSBF), quant à lui, détecte automatiquement les crises en se basant sur les signaux icEEG captés par des électrodes intracrâniennes et permet une rétroaction par une stimulation électrique au même endroit afin d’interrompre ces crises. La puce de détection de crises et le stimulateur électrique à base sur FPGA ont été assemblés à des électrodes afin de compléter la prothèse proposée. Ce NSBF a été validé en utilisant des enregistrements d’icEEG de dix patients souffrant d’épilepsie réfractaire. Les résultats révèlent une performance excellente pour la détection précoce de crises et pour l’auto-déclenchement subséquent d’une stimulation électrique. La consommation énergétique totale du NSBF est de 16 mW. Une autre alternative à la stimulation électrique est l’injection locale de médicaments, un traitement prometteur de l’épilepsie. Un système local de livraison de médicament basé sur un nouveau détecteur asynchrone des crises est présenté.----------ABSTRACT Emerging implantable microdevices hold great promise for the treatment of patients with neurological conditions. These biomedical systems have been exploited as unconventional treatment for the conventionally untreatable patients. Recent progress in brain-machine-interface activities has led the researchers to analyze the intracerebral EEG (icEEG) recording in real-time and deliver subsequent treatments. We present in this thesis a long-term safe and reliable low-power microsystem-based implantable device to perform efficient neural signal recording, seizure detection and subsequent treatment for epilepsy. The main contributions presented in this thesis are reported in five journal manuscripts, published or accepted for publication in IEEE Journals, and many others such as Low Power Electronics, and Emerging Technologies in Computing. The proposed microsystem includes a low-power integrated circuit (IC) intended for real-time epileptic seizure detection. This IC integrates a front-end preamplifier and epileptic seizure detector. The preamplifier is based on a new chopper stabilizer topology that reduces noise and power dissipation. The fabricated IC was tested using icEEG recordings from seven patients with drug-resistant epilepsy. The average seizure detection delay was 13.5 sec, well before the onset of clinical manifestations. The measured total power consumption of this chip is 51 µW. A closed-loop neurostimulator (CLNS) is next introduced, which is dedicated to automatically detect seizure based on icEEG recordings from intracranial electrode contacts and provide an electrical stimulation feedback to the same contacts in order to disrupt these seizures. The seizure detector chip and a dedicated FPGA-based electrical stimulator were assembled together with common recording electrodes to complete the proposed prosthesis. This CLNS was validated offline using recording from ten patients with refractory epilepsy, and showed excellent performance for early detection of seizures and subsequent self-triggering electrical stimulation. Total power consumption of the CLNS is 16 mW. Alternatively, focal drug injection is the promising treatment for epilepsy. A responsive focal drug delivery system based on a new asynchronous seizure detector is also presented. The later system with data-dependent computation reduces up to 49% power consumption compared to the previous synchronous neurostimulator

Integrated Circuits and Systems for Smart Sensory Applications

Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware

Complementary Detection for Hardware Efficient On-site Monitoring of Parkinsonian Progress

The progress of Parkinson & #x2019;s disease (PD) in patients is conventionally monitored through follow-up visits. These may be insufficient for clinicians to obtain a good understanding of the occurrence and severity of symptoms in order to adjust therapy to the patients & #x2019; needs. Portable platforms for PD diagnostics can provide in-depth information, thus reducing the frequency of face-to-face visits. This paper describes the first known on-site PD detection and monitoring processor. This is achieved by employing complementary detection which uses a combination of weak k-NN classifiers to produce a classifier with a higher consistency and confidence level than the individual classifiers. Various implementations of the classifier are investigated for trade-offs in terms of area, power and detection performance. Detection performances are validated on an FPGA platform. Achieved accuracy measures were: Matthews correlation coefficient of 0.6162, mean F1-score of 91.38 & #x0025;, and mean classification accuracy of 91.91 & #x0025;. By mapping the implemented designs on a 45 nm CMOS process, the optimal configuration achieved a dynamic power per channel of 2.26 & #x03BC;W and an area per channel of 0.24 mm2

Low-Power Implantable Device for Onset Detection and Subsequent Treatment of Epileptic Seizures: A Review

Over the past few years, there has been growing interest in neuro-responsive intracerebral local treatments of seizures, such as focal drug delivery, focal cooling, or electrical stimulation. This mode of treatment requires an effective intracerebral electroencephalographic acquisition system, seizure detector, brain stimulator, and wireless system that consume ultra-low power. This review focuses on alternative brain stimulation treatments for medically intractable epilepsy patients. We mainly discuss clinical studies of long-term responsive stimulation and suggest safer optimized therapeutic options for epilepsy. Finally, we conclude our study with the proposed low-power, implantable fully integrated device that automatically detects low-voltage fast activity ictal onsets and triggers focal treatment to disrupt seizure progression. The detection performance was verified using intracerebral electroencephalographic recordings from two patients with epilepsy. Further experimental validation of this prototype is underway

ResOT: Resource-Efficient Oblique Trees for Neural Signal Classification

Classifiers that can be implemented on chip with minimal computational and memory resources are essential for edge computing in emerging applications such as medical and IoT devices. This paper introduces a machine learning model based on oblique decision trees to enable resource-efficient classification on a neural implant. By integrating model compression with probabilistic routing and implementing cost-aware learning, our proposed model could significantly reduce the memory and hardware cost compared to state-of-the-art models, while maintaining the classification accuracy. We trained the resource-efficient oblique tree with power-efficient regularization (ResOT-PE) on three neural classification tasks to evaluate the performance, memory, and hardware requirements. On seizure detection task, we were able to reduce the model size by 3.4X and the feature extraction cost by 14.6X compared to the ensemble of boosted trees, using the intracranial EEG from 10 epilepsy patients. In a second experiment, we tested the ResOT-PE model on tremor detection for Parkinson's disease, using the local field potentials from 12 patients implanted with a deep-brain stimulation (DBS) device. We achieved a comparable classification performance as the state-of-the-art boosted tree ensemble, while reducing the model size and feature extraction cost by 10.6X and 6.8X, respectively. We also tested on a 6-class finger movement detection task using ECoG recordings from 9 subjects, reducing the model size by 17.6X and feature computation cost by 5.1X. The proposed model can enable a low-power and memory-efficient implementation of classifiers for real-time neurological disease detection and motor decoding

Wearable electroencephalography for long-term monitoring and diagnostic purposes

Truly Wearable EEG (WEEG) can be considered as the future of ambulatory EEG units, which are the current standard for long-term EEG monitoring. Replacing these short lifetime, bulky units with long-lasting, miniature and wearable devices that can be easily worn by patients will result in more EEG data being collected for extended monitoring periods. This thesis presents three new fabricated systems, in the form of Application Specific Integrated Circuits (ASICs), to aid the diagnosis of epilepsy and sleep disorders by detecting specific clinically important EEG events on the sensor node, while discarding background activity. The power consumption of the WEEG monitoring device incorporating these systems can be reduced since the transmitter, which is the dominating element in terms of power consumption, will only become active based on the output of these systems. Candidate interictal activity is identified by the developed analog-based interictal spike selection system-on-chip (SoC), using an approximation of the Continuous Wavelet Transform (CWT), as a bandpass filter, and thresholding. The spike selection SoC is fabricated in a 0.35 μm CMOS process and consumes 950 nW. Experimental results reveal that the SoC is able to identify 87% of interictal spikes correctly while only transmitting 45% of the data. Sections of EEG data containing likely ictal activity are detected by an analog seizure selection SoC using the low complexity line length feature. This SoC is fabricated in a 0.18 μm CMOS technology and consumes 1.14 μW. Based on experimental results, the fabricated SoC is able to correctly detect 83% of seizure episodes while transmitting 52% of the overall EEG data. A single-channel analog-based sleep spindle detection SoC is developed to aid the diagnosis of sleep disorders by detecting sleep spindles, which are characteristic events of sleep. The system identifies spindle events by monitoring abrupt changes in the input EEG. An approximation of the median frequency calculation, incorporated as part of the system, allows for non-spindle activity incorrectly identified by the system as sleep spindles to be discarded. The sleep spindle detection SoC is fabricated in a 0.18 μm CMOS technology, consuming only 515 nW. The SoC achieves a sensitivity and specificity of 71.5% and 98% respectively.Open Acces