Methodologies synthesis

This deliverable deals with the modelling and analysis of interdependencies between critical infrastructures, focussing attention on two interdependent infrastructures studied in the context of CRUTIAL: the electric power infrastructure and the information infrastructures supporting management, control and maintenance functionality. The main objectives are: 1) investigate the main challenges to be addressed for the analysis and modelling of interdependencies, 2) review the modelling methodologies and tools that can be used to address these challenges and support the evaluation of the impact of interdependencies on the dependability and resilience of the service delivered to the users, and 3) present the preliminary directions investigated so far by the CRUTIAL consortium for describing and modelling interdependencies

DAG-Based Attack and Defense Modeling: Don't Miss the Forest for the Attack Trees

This paper presents the current state of the art on attack and defense modeling approaches that are based on directed acyclic graphs (DAGs). DAGs allow for a hierarchical decomposition of complex scenarios into simple, easily understandable and quantifiable actions. Methods based on threat trees and Bayesian networks are two well-known approaches to security modeling. However there exist more than 30 DAG-based methodologies, each having different features and goals. The objective of this survey is to present a complete overview of graphical attack and defense modeling techniques based on DAGs. This consists of summarizing the existing methodologies, comparing their features and proposing a taxonomy of the described formalisms. This article also supports the selection of an adequate modeling technique depending on user requirements

Comunicações confiáveis sem-fios para redes veiculares

Vehicular communications are a promising field of research, with numerous potential services that can enhance traffic experience. Road safety is the most important objective behind the development of wireless vehicular networks, since many of the current accidents and fatalities could be avoided if vehicles had the ability to share information among them, with the road-side infrastructure and other road users. A future with safe, efficient and comfortable road transportation systems is envisaged by the different traffic stakeholders - users, manufacturers, road operators and public authorities. Cooperative Intelligent Transportation Systems (ITS) applications will contribute to achieve this goal, as well as other technological progress, such as automated driving or improved road infrastructure based on advanced sensoring and the Internet of Things (IoT) paradigm. Despite these significant benefits, the design of vehicular communications systems poses difficult challenges, mainly due to the very dynamic environments in which they operate. In order to attain the safety-critical requirements involved in this type of scenarios, careful planning is necessary, so that a trustworthy behaviour of the system can be achieved. Dependability and real-time systems concepts provide essential tools to handle this challenging task of enabling determinism and fault-tolerance in vehicular networks. This thesis aims to address some of these issues by proposing architectures and implementing mechanisms that improve the dependability levels of realtime vehicular communications. The developed strategies always try to preserve the required system’s flexibity, a fundamental property in such unpredictable scenarios, where unexpected events may occur and force the system to quickly adapt to the new circumnstances.The core contribution of this thesis focuses on the design of a fault-tolerant architecture for infrastructure-based vehicular networks. It encompasses a set of mechanisms that allow error detection and fault-tolerant behaviour both in the mobile and static nodes of the network. Road-side infrastructure plays a key role in this context, since it provides the support for coordinating all communications taking place in the wireless medium. Furthermore, it is also responsible for admission control policies and exchanging information with the backbone network. The proposed methods rely on a deterministic medium access control (MAC) protocol that provides real-time guarantees in wireless channel access, ensuring that communications take place before a given deadline. However, the presented solutions are generic and can be easily adapted to other protocols and wireless technologies. Interference mitigation techniques, mechanisms to enforce fail-silent behaviour and redundancy schemes are introduced in this work, so that vehicular communications systems may present higher dependability levels. In addition to this, all of these methods are included in the design of vehicular network components, guaranteeing that the real-time constraints are still fulfilled. In conclusion, wireless vehicular networks hold the potential to drastically improve road safety. However, these systems should present dependable behaviour in order to reliably prevent the occurrence of catastrophic events under all possible traffic scenarios.As comunicações veiculares são uma área de investigação bastante promissora, com inúmeros potenciais serviços que podem melhorar a experiência vivida no tráfego. A segurança rodoviária é o objectivo mais importante por detrás do desenvolvimento das redes veiculares sem-fios, visto que muitos dos atuais acidentes e vítimas mortais poderiam ser evitados caso os veículos tivessem a capacidade de trocar informação entre eles, com a infraestrutura rodoviária e outros utilizadores da estrada. Um futuro com sistemas de transporte rodoviário seguros, eficientes e confortáveis é algo ambicionado pelas diferentes partes envolvidas - utilizadores, fabricantes, operadores da infraestrutura e autoridades públicas. As aplicações de Sistemas Inteligentes de Transporte (ITS) cooperativas vão contribuir para alcançar este propósito, em conjunto com outros avanços tecnológicos, nomeadamente a condução autónoma ou uma melhor infraestrutura rodoviária baseada em sensorização avançada e no paradigma da Internet das Coisas (IoT). Apesar destes benefícios significativos, o desenho de sistemas de comunicações veiculares coloca desafios difíceis, em grande parte devido aos ambientes extremamente dinâmicos em que estes operam. De modo a atingir os requisitos de segurança crítica envolvidos neste tipo de cenários, é necessário um cuidadoso planeamento por forma a que o sistema apresente um comportamento confiável. Conceitos de dependabilidade e de sistemas de tempo-real constituem ferramentas essenciais para lidar com esta desafiante tarefa de dotar as redes veiculares de determinismo e tolerância a faltas. Esta tese pretende endereçar alguns destes problemas através da proposta de arquitecturas e da implementação de mecanismos que melhorem os níveis da dependabilidade das comunicações veiculares de tempo-real. As estratégias desenvolvidas tentam sempre preservar a necessária flexibilidade do sistema, uma propriedade fundamental em cenários tão imprevisíveis, onde eventos inesperados podem ocorrer e forçar o sistema a adaptar-se rapidamente às novas circunstâncias.A contribuição principal desta tese foca-se no desenho de uma arquitectura tolerante a faltas para redes veiculares com suporte da infraestrutura de beira de estrada. Esta arquitectura engloba um conjunto de mecanismos que permite detecção de erros e comportamento tolerante a faltas, tanto nos nós móveis como nos nós estáticos da rede. A infraestrutura de beira de estrada desempenha um papel fundamental neste contexto, pois fornece o suporte que permite coordenar todas as comunicações que ocorrem no meio sem-fios. Para além disso, é também responsável pelos mecanismos de controlo de admissão e pela troca de informação com a rede de transporte. Os métodos propostos baseiam-se num protocolo determinístico de controlo de acesso ao meio (MAC) que fornece garantias de tempo-real no accesso ao canal semfios, assegurando que as comunicações ocorrem antes de um determinado limite temporal. No entanto, as soluções apresentadas são genéricas e podem ser facilmente adaptadas a outros protocolos e tecnologias sem-fios. Neste trabalho são introduzidas técnicas de mitigação de interferência, mecanismos para assegurar comportamento falha-silêncio e esquemas de redundância, de modo a que os sistemas de comunicações veiculares apresentem elevados níveis de dependabilidade. Além disso, todos estes métodos são incorporados no desenho dos componentes da rede veicular, guarantindo que as restrições de tempo-real continuam a ser cumpridas. Em suma, as redes veiculares sem-fios têm o potential para melhorar drasticamente a segurança rodoviária. Contudo, estes sistemas precisam de apresentar um comportamento confiável, de forma a prevenir a ocorrência de eventos catastróficos em todos os cenários de tráfego possíveis.Programa Doutoral em Telecomunicaçõe

Resilience-Building Technologies: State of Knowledge -- ReSIST NoE Deliverable D12

This document is the first product of work package WP2, "Resilience-building and -scaling technologies", in the programme of jointly executed research (JER) of the ReSIST Network of Excellenc

Proposal of an Adaptive Fault Tolerance Mechanism to Tolerate Intermittent Faults in RAM

[EN] Due to transistor shrinking, intermittent faults are a major concern in current digital systems. This work presents an adaptive fault tolerance mechanism based on error correction codes (ECC), able to modify its behavior when the error conditions change without increasing the redundancy. As a case example, we have designed a mechanism that can detect intermittent faults and swap from an initial generic ECC to a specific ECC capable of tolerating one intermittent fault. We have inserted the mechanism in the memory system of a 32-bit RISC processor and validated it by using VHDL simulation-based fault injection. We have used two (39, 32) codes: a single error correction-double error detection (SEC-DED) and a code developed by our research group, called EPB3932, capable of correcting single errors and double and triple adjacent errors that include a bit previously tagged as error-prone. The results of injecting transient, intermittent, and combinations of intermittent and transient faults show that the proposed mechanism works properly. As an example, the percentage of failures and latent errors is 0% when injecting a triple adjacent fault after an intermittent stuck-at fault. We have synthesized the adaptive fault tolerance mechanism proposed in two types of FPGAs: non-reconfigurable and partially reconfigurable. In both cases, the overhead introduced is affordable in terms of hardware, time and power consumption.This research was supported in part by the Spanish Government, project TIN2016-81,075-R, and by Primeros Proyectos de Investigacion (PAID-06-18), Vicerrectorado de Investigacion, Innovacion y Transferencia de la Universitat Politecnica de Valencia (UPV), project 20190032.Baraza Calvo, JC.; Gracia-Morán, J.; Saiz-Adalid, L.; Gil Tomás, DA.; Gil, P. (2020). Proposal of an Adaptive Fault Tolerance Mechanism to Tolerate Intermittent Faults in RAM. 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ACM SIGPLAN Notices, 47(4), 111-122. doi:10.1145/2248487.2150989Gil-Tomás, D., Gracia-Morán, J., Baraza-Calvo, J.-C., Saiz-Adalid, L.-J., & Gil-Vicente, P.-J. (2012). Studying the effects of intermittent faults on a microcontroller. Microelectronics Reliability, 52(11), 2837-2846. doi:10.1016/j.microrel.2012.06.004Plasma CPU Modelhttps://opencores.org/projects/plasmaArlat, J., Aguera, M., Amat, L., Crouzet, Y., Fabre, J.-C., Laprie, J.-C., … Powell, D. (1990). Fault injection for dependability validation: a methodology and some applications. IEEE Transactions on Software Engineering, 16(2), 166-182. doi:10.1109/32.44380Gil-Tomas, D., Gracia-Moran, J., Baraza-Calvo, J.-C., Saiz-Adalid, L.-J., & Gil-Vicente, P.-J. (2012). Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection. IEEE Design & Test of Computers, 29(6), 66-73. doi:10.1109/mdt.2011.2179514Rashid, L., Pattabiraman, K., & Gopalakrishnan, S. (2010). Modeling the Propagation of Intermittent Hardware Faults in Programs. 2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing. doi:10.1109/prdc.2010.52Amiri, M., Siddiqui, F. M., Kelly, C., Woods, R., Rafferty, K., & Bardak, B. (2016). FPGA-Based Soft-Core Processors for Image Processing Applications. Journal of Signal Processing Systems, 87(1), 139-156. doi:10.1007/s11265-016-1185-7Hailesellasie, M., Hasan, S. R., & Mohamed, O. A. (2019). MulMapper: Towards an Automated FPGA-Based CNN Processor Generator Based on a Dynamic Design Space Exploration. 2019 IEEE International Symposium on Circuits and Systems (ISCAS). doi:10.1109/iscas.2019.8702589Mittal, S. (2018). A survey of FPGA-based accelerators for convolutional neural networks. Neural Computing and Applications, 32(4), 1109-1139. doi:10.1007/s00521-018-3761-1Intel Completes Acquisition of Alterahttps://newsroom.intel.com/news-releases/intel-completes-acquisition-of-altera/#gs.mi6ujuAMD to Acquire Xilinx, Creating the Industry’s High Performance Computing Leaderhttps://www.amd.com/en/press-releases/2020-10-27-amd-to-acquire-xilinx-creating-the-industry-s-high-performance-computingKim, K. H., & Lawrence, T. F. (s. f.). Adaptive fault tolerance: issues and approaches. [1990] Proceedings. Second IEEE Workshop on Future Trends of Distributed Computing Systems. doi:10.1109/ftdcs.1990.138292Gonzalez, O., Shrikumar, H., Stankovic, J. A., & Ramamritham, K. (s. f.). Adaptive fault tolerance and graceful degradation under dynamic hard real-time scheduling. Proceedings Real-Time Systems Symposium. doi:10.1109/real.1997.641271Jacobs, A., George, A. D., & Cieslewski, G. (2009). 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Reliability-Based ECC System for Adaptive Protection of NAND Flash Memories. 2015 Fifth International Conference on Communication Systems and Network Technologies. doi:10.1109/csnt.2015.23Zhou, Y., Wu, F., Lu, Z., He, X., Huang, P., & Xie, C. (2019). SCORE. ACM Transactions on Architecture and Code Optimization, 15(4), 1-25. doi:10.1145/3291052Lu, S.-K., Li, H.-P., & Miyase, K. (2018). Adaptive ECC Techniques for Reliability and Yield Enhancement of Phase Change Memory. 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS). doi:10.1109/iolts.2018.8474118Chen, J., Andjelkovic, M., Simevski, A., Li, Y., Skoncej, P., & Krstic, M. (2019). Design of SRAM-Based Low-Cost SEU Monitor for Self-Adaptive Multiprocessing Systems. 2019 22nd Euromicro Conference on Digital System Design (DSD). doi:10.1109/dsd.2019.00080Wang, X., Jiang, L., & Chakrabarty, K. (2020). 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