Distributed multi-user MIMO transmission using real-time sigma-delta-over-fiber for next generation fronthaul interface

To achieve the massive device connectivity and high data rate demanded by 5G, wireless transmission with wider signal bandwidths and higher-order multiple-input multiple-output (MIMO) is inevitable. This work demonstrates a possible function split option for the next generation fronthaul interface (NGFI). The proof-of-concept downlink architecture consists of real-time sigma-delta modulated signal over fiber (SDoF) links in combination with distributed multi-user (MU) MIMO transmission. The setup is fully implemented using off-the-shelf and in-house developed components. A single SDoF link achieves an error vector magnitude (EVM) of 3.14% for a 163.84 MHz-bandwidth 256-QAM OFDM signal (958.64 Mbps) with a carrier frequency around 3.5 GHz transmitted over 100 m OM4 multi-mode fiber at 850 nm using a commercial QSFP module. The centralized architecture of the proposed setup introduces no frequency asynchronism among remote radio units. For most cases, the 2 x 2 MU-MIMO transmission has little performance degradation compared to SISO, 0.8 dB EVM degradation for 40.96 MHz-bandwidth signals and 1.4 dB for 163.84 MHz-bandwidth on average, implying that the wireless spectral efficiency almost doubles by exploiting spatial multiplexing. A 1.4 Gbps data rate (720 Mbps per user, 163.84 MHz-bandwidth, 64-QAM) is reached with an average EVM of 6.66%. The performance shows that this approach is feasible for the high-capacity hot-spot scenario

Output Filter Aware Optimization of the Noise Shaping Properties of {\Delta}{\Sigma} Modulators via Semi-Definite Programming

The Noise Transfer Function (NTF) of {\Delta}{\Sigma} modulators is typically designed after the features of the input signal. We suggest that in many applications, and notably those involving D/D and D/A conversion or actuation, the NTF should instead be shaped after the properties of the output/reconstruction filter. To this aim, we propose a framework for optimal design based on the Kalman-Yakubovich-Popov (KYP) lemma and semi-definite programming. Some examples illustrate how in practical cases the proposed strategy can outperform more standard approaches.Comment: 14 pages, 18 figures, journal. Code accompanying the paper is available at http://pydsm.googlecode.co

Implementation of the onboard ADC and DAC on the Spartan 3E FPGA platform.

The objective of this project is to first interface the on board ADC and DAC available in the Spartan 3E FPGA platform, so that the real signals too can be processed by the FPGA board. Thus first of all, the ADC was interfaced and the results were observed via ChipScope Pro. Then the DAC was interfaced and checked if it was working or not. Finally both were operated together, where registers were used to store the values of the digital data obtained from the ADC and then sent to the DAC for the reconstruction of the original signal, which could be observed via a DSO. ADC is a prime requirement whenever real-world signals come into play, hence interfacing the ADC is of great use and help in using the real-world signals for our use and further processing to extract vital information. DAC also aids in the said process similarly. The basic aim being that a given input signal should output exactly or nearly exactly the given input signal after having it passed through the ADC and the DAC

Distributed Massive MIMO via all-Digital Radio Over Fiber

A crucial challenge in the implementation of distributed massive multiple-input multiple-output (MIMO) architectures is to provide phase coherence while, at the same time, limit the complexity of the remote-radio heads (RRHs), which is important for cost-efficient scalability. To address this challenge, we present in this paper a phase-coherent distributed MIMO architecture, based on off-the-shelf, low-cost components. In the proposed architecture, up- and down-conversion are carried out at the central unit (CU). The RRHs are connected to the CU by means of optical fibers carrying oversampled radio-frequency (RF) 1-bit signals. In the downlink, the 1-bit signal is generated via sigma-delta modulation. At the RRH, the RF signal is recovered from the 1-bit signal through a bandpass filter and a power amplifier, and then fed to an antenna. In the uplink, the 1-bit signal is generated by a comparator whose inputs are the low-noise-amplified received RF signal and a suitably designed dither signal. The performance of the proposed architecture is evaluated with satisfactory results both via simulation and measurements from a testbed

Comparator Design in Sensors for Environmental Monitoring

This paper presents circuit design considerations of comparator in analog-to-digital converters (ADC) applied for a portable, low-cost and high performance nano-sensor chip which can be applied to detect the airborne magnetite pollution nano particulate matter (PM) for environmental monitoring. High-resolution ADC plays a vital important role in high perfor-mance nano-sensor, while high-resolution comparator is a key component in ADC. In this work, some important design issues related to comparators in analog-to-digital converters (ADCs) are discussed, simulation results show that the resolution of the comparator proposed can achieve 5µV , and it is appropriate for high-resolution application

Hardware for digitally controlled scanned probe microscopes

The design and implementation of a flexible and modular digital control and data acquisition system for scanned probe microscopes (SPMs) is presented. The measured performance of the system shows it to be capable of 14-bit data acquisition at a 100-kHz rate and a full 18-bit output resolution resulting in less than 0.02-Å rms position noise while maintaining a scan range in excess of 1 µm in both the X and Y dimensions. This level of performance achieves the goal of making the noise of the microscope control system an insignificant factor for most experiments. The adaptation of the system to various types of SPM experiments is discussed. Advances in audio electronics and digital signal processors have made the construction of such high performance systems possible at low cost

Noise Weighting in the Design of {\Delta}{\Sigma} Modulators (with a Psychoacoustic Coder as an Example)

A design flow for {\Delta}{\Sigma} modulators is illustrated, allowing quantization noise to be shaped according to an arbitrary weighting profile. Being based on FIR NTFs, possibly with high order, the flow is best suited for digital architectures. The work builds on a recent proposal where the modulator is matched to the reconstruction filter, showing that this type of optimization can benefit a wide range of applications where noise (including in-band noise) is known to have a different impact at different frequencies. The design of a multiband modulator, a modulator avoiding DC noise, and an audio modulator capable of distributing quantization artifacts according to a psychoacoustic model are discussed as examples. A software toolbox is provided as a general design aid and to replicate the proposed results.Comment: 5 pages, 18 figures, journal. Code accompanying the paper is available at http://pydsm.googlecode.co

Python modelling of the SX1257 transceiver

The main purpose of this project is to create a python model of the SX1257 transceiver by Semtech and everything has been prepared in order to be able to compare the model with the real component in the near future. The ultimate goal is to have a simulation model that can be used to develop FPGA SDR designs, for example by cosimulating the HDL code with the python model using the cocotb cosimulation framework.Universidad de Sevilla. Grado en Ingeniería de las Tecnologías de Telecomunicación