469 research outputs found

    Process Completing Sequences for Resource Allocation Systems with Synchronization

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    This paper considers the problem of establishing live resource allocation in workflows with synchronization stages. Establishing live resource allocation in this class of systems is challenging since deciding whether a given level of resource capacities is sufficient to complete a single process is NP-complete. In this paper, we develop two necessary conditions and one sufficient condition that provide quickly computable tests for the existence of process completing sequences. The necessary conditions are based on the sequence of completions of � subprocesses that merge together at a synchronization. Although the worst case complexity is O(2�), we expect the number of subprocesses combined at any synchronization will be sufficiently small so that total computation time remains manageable. The sufficient condition uses a reduction scheme that computes a sufficient capacity level of each resource type to complete and merge all � subprocesses. The worst case complexity is O(�⋅�), where � is the number of synchronizations. Finally, the paper develops capacity bounds and polynomial methods for generating feasible resource allocation sequences for merging systems with single unit allocation. This method is based on single step look-ahead for deadly marked siphons and is O(2�). Throughout the paper, we use a class of Petri nets called Generalized Augmented Marked Graphs to represent our resource allocation systems

    Process Completing Sequences for Resource Allocation Systems with Synchronization

    Get PDF
    This paper considers the problem of establishing live resource allocation in workflows with synchronization stages. Establishing live resource allocation in this class of systems is challenging since deciding whether a given level of resource capacities is sufficient to complete a single process is NP-complete. In this paper, we develop two necessary conditions and one sufficient condition that provide quickly computable tests for the existence of process completing sequences. The necessary conditions are based on the sequence of completions of subprocesses that merge together at a synchronization. Although the worst case complexity is O(2), we expect the number of subprocesses combined at any synchronization will be sufficiently small so that total computation time remains manageable. The sufficient condition uses a reduction scheme that computes a sufficient capacity level of each resource type to complete and merge all subprocesses. The worst case complexity is O(⋅), where is the number of synchronizations. Finally, the paper develops capacity bounds and polynomial methods for generating feasible resource allocation sequences for merging systems with single unit allocation. This method is based on single step look-ahead for deadly marked siphons and is O(2). Throughout the paper, we use a class of Petri nets called Generalized Augmented Marked Graphs to represent our resource allocation systems

    The investigation of the effect of scheduling rules on FMS performance

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    The application of Flexible Manufacturing Systems (FMSs) has an effect in competitiveness, not only of individual companies but of those countries whose manufactured exports play a significant part in their economy (Hartley, 1984). However, the increasing use of FM Ss to effectively provide customers with diversified products has created a significant set of operational challenges for managers (Mahmoodi et al., 1999). In more recent years therefore, there has been a concentration of effort on FMS scheduling without which the benefits of an FMS cannot be realized. The objective of the reported research is to investigate and extend the contribution which can be made to the FMS scheduling problem through the implementation of computer-based experiments that consider real-time situations. [Continues.

    Performance evaluation of warehouses with automated storage and retrieval technologies.

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    In this dissertation, we study the performance evaluation of two automated warehouse material handling (MH) technologies - automated storage/retrieval system (AS/RS) and autonomous vehicle storage/retrieval system (AVS/RS). AS/RS is a traditional automated warehouse MH technology and has been used for more than five decades. AVS/RS is a relatively new automated warehouse MH technology and an alternative to AS/RS. There are two possible configurations of AVS/RS: AVS/RS with tier-captive vehicles and AVS/RS with tier-to-tier vehicles. We model the AS/RS and both configurations of the AVS/RS as queueing networks. We analyze and develop approximate algorithms for these network models and use them to estimate performance of the two automated warehouse MH technologies. Chapter 2 contains two parts. The first part is a brief review of existing papers about AS/RS and AVS/RS. The second part is a methodological review of queueing network theory, which serves as a building block for our study. In Chapter 3, we model AS/RSs and AVS/RSs with tier-captive vehicles as open queueing networks (OQNs). We show how to analyze OQNs and estimate related performance measures. We then apply an existing OQN analyzer to compare the two MH technologies and answer various design questions. In Chapter 4 and Chapter 5, we present some efficient algorithms to solve SOQN. We show how to model AVS/RSs with tier-to-tier vehicles as SOQNs and evaluate performance of these designs in Chapter 6. AVS/RS is a relatively new automated warehouse design technology. Hence, there are few efficient analytical tools to evaluate performance measures of this technology. We developed some efficient algorithms based on SOQN to quickly and effectively evaluate performance of AVS/RS. Additionally, we present a tool that helps a warehouse designer during the concepting stage to determine the type of MH technology to use, analyze numerous alternate warehouse configurations and select one of these for final implementation

    A flexible control system for flexible manufacturing systems

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    A flexible workcell controller has been developed using a three level control hierarchy (workcell, workstation, equipment). The cell controller is automatically generated from a model input by the user. The model consists of three sets of graphs. One set of graphs describes the process plans of the parts produced by the manufacturing system, one set describes movements into, out of and within workstations, and the third set describes movements of parts/transporters between workstations. The controller uses an event driven Petri net to maintain state information and to communicate with lower level controllers. The control logic is contained in an artificial neural network. The Petri net state information is used as the input to the neural net and messages that are Petri net events are output from the neural net. A genetic algorithm was used to search over alternative operation choices to find a "good" solution. The system was fully implemented and several test cases are described

    Decompose and Conquer: Addressing Evasive Errors in Systems on Chip

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    Modern computer chips comprise many components, including microprocessor cores, memory modules, on-chip networks, and accelerators. Such system-on-chip (SoC) designs are deployed in a variety of computing devices: from internet-of-things, to smartphones, to personal computers, to data centers. In this dissertation, we discuss evasive errors in SoC designs and how these errors can be addressed efficiently. In particular, we focus on two types of errors: design bugs and permanent faults. Design bugs originate from the limited amount of time allowed for design verification and validation. Thus, they are often found in functional features that are rarely activated. Complete functional verification, which can eliminate design bugs, is extremely time-consuming, thus impractical in modern complex SoC designs. Permanent faults are caused by failures of fragile transistors in nano-scale semiconductor manufacturing processes. Indeed, weak transistors may wear out unexpectedly within the lifespan of the design. Hardware structures that reduce the occurrence of permanent faults incur significant silicon area or performance overheads, thus they are infeasible for most cost-sensitive SoC designs. To tackle and overcome these evasive errors efficiently, we propose to leverage the principle of decomposition to lower the complexity of the software analysis or the hardware structures involved. To this end, we present several decomposition techniques, specific to major SoC components. We first focus on microprocessor cores, by presenting a lightweight bug-masking analysis that decomposes a program into individual instructions to identify if a design bug would be masked by the program's execution. We then move to memory subsystems: there, we offer an efficient memory consistency testing framework to detect buggy memory-ordering behaviors, which decomposes the memory-ordering graph into small components based on incremental differences. We also propose a microarchitectural patching solution for memory subsystem bugs, which augments each core node with a small distributed programmable logic, instead of including a global patching module. In the context of on-chip networks, we propose two routing reconfiguration algorithms that bypass faulty network resources. The first computes short-term routes in a distributed fashion, localized to the fault region. The second decomposes application-aware routing computation into simple routing rules so to quickly find deadlock-free, application-optimized routes in a fault-ridden network. Finally, we consider general accelerator modules in SoC designs. When a system includes many accelerators, there are a variety of interactions among them that must be verified to catch buggy interactions. To this end, we decompose such inter-module communication into basic interaction elements, which can be reassembled into new, interesting tests. Overall, we show that the decomposition of complex software algorithms and hardware structures can significantly reduce overheads: up to three orders of magnitude in the bug-masking analysis and the application-aware routing, approximately 50 times in the routing reconfiguration latency, and 5 times on average in the memory-ordering graph checking. These overhead reductions come with losses in error coverage: 23% undetected bug-masking incidents, 39% non-patchable memory bugs, and occasionally we overlook rare patterns of multiple faults. In this dissertation, we discuss the ideas and their trade-offs, and present future research directions.PHDComputer Science & EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/147637/1/doowon_1.pd

    NASA space station automation: AI-based technology review

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    Research and Development projects in automation for the Space Station are discussed. Artificial Intelligence (AI) based automation technologies are planned to enhance crew safety through reduced need for EVA, increase crew productivity through the reduction of routine operations, increase space station autonomy, and augment space station capability through the use of teleoperation and robotics. AI technology will also be developed for the servicing of satellites at the Space Station, system monitoring and diagnosis, space manufacturing, and the assembly of large space structures

    Contributions to the deadlock problem in multithreaded software applications observed as Resource Allocation Systems

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    Desde el punto de vista de la competencia por recursos compartidos sucesivamente reutilizables, se dice que un sistema concurrente compuesto por procesos secuenciales está en situación de bloqueo si existe en él un conjunto de procesos que están indefinidamente esperando la liberación de ciertos recursos retenidos por miembros del mismo conjunto de procesos. En sistemas razonablemente complejos o distribuidos, establecer una política de asignación de recursos que sea libre de bloqueos puede ser un problema muy difícil de resolver de forma eficiente. En este sentido, los modelos formales, y particularmente las redes de Petri, se han ido afianzando como herramientas fructíferas que permiten abstraer el problema de asignación de recursos en este tipo de sistemas, con el fin de abordarlo analíticamente y proveer métodos eficientes para la correcta construcción o corrección de estos sistemas. En particular, la teoría estructural de redes de Petri se postula como un potente aliado para lidiar con el problema de la explosión de estados inherente a aquéllos. En este fértil contexto han florecido una serie de trabajos que defienden una propuesta metodológica de diseño orientada al estudio estructural y la correspondiente corrección física del problema de asignación de recursos en familias de sistemas muy significativas en determinados contextos de aplicación, como el de los Sistemas de Fabricación Flexible. Las clases de modelos de redes de Petri resultantes asumen ciertas restricciones, con significado físico en el contexto de aplicación para el que están destinadas, que alivian en buena medida la complejidad del problema. En la presente tesis, se intenta acercar ese tipo de aproximación metodológica al diseño de aplicaciones software multihilo libres de bloqueos. A tal efecto, se pone de manifiesto cómo aquellas restricciones procedentes del mundo de los Sistemas de Fabricación Flexible se muestran demasiado severas para aprehender la versatilidad inherente a los sistemas software en lo que respecta a la interacción de los procesos con los recursos compartidos. En particular, se han de resaltar dos necesidades de modelado fundamentales que obstaculizan la mera adopción de antiguas aproximaciones surgidas bajo el prisma de otros dominios: (1) la necesidad de soportar el anidamiento de bucles no desplegables en el interior de los procesos, y (2) la posible compartición de recursos no disponibles en el arranque del sistema pero que son creados o declarados por un proceso en ejecución. A resultas, se identifica una serie de requerimientos básicos para la definición de un tipo de modelos orientado al estudio de sistemas software multihilo y se presenta una clase de redes de Petri, llamada PC2R, que cumple dicha lista de requerimientos, manteniéndose a su vez respetuosa con la filosofía de diseño de anteriores subclases enfocadas a otros contextos de aplicación. Junto con la revisión e integración de anteriores resultados en el nuevo marco conceptual, se aborda el estudio de propiedades inherentes a los sistemas resultantes y su relación profunda con otros tipos de modelos, la confección de resultados y algoritmos eficientes para el análisis estructural de vivacidad en la nueva clase, así como la revisión y propuesta de métodos de resolución de los problemas de bloqueo adaptadas a las particularidades físicas del dominio de aplicación. Asimismo, se estudia la complejidad computacional de ciertas vertientes relacionadas con el problema de asignación de recursos en el nuevo contexto, así como la traslación de los resultados anteriormente mencionados sobre el dominio de la ingeniería de software multihilo, donde la nueva clase de redes permite afrontar problemas inabordables considerando el marco teórico y las herramientas suministradas para subclases anteriormente explotadas

    The co-incident flow of work pieces and cutting tools in a restricted category of flexible machining cells

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    The work reported in this thesis describes research carried out into the detailed design and operation of Flexible Machining Cells (FMC) incorporating automated work and tool flow, dual flow. Three modes of cell management are considered for dual flow cells, where the author examines both their operational and economic performance. A framework is defined for investigating these dual flow cells, and a structured approach providing a novel and detailed modelling capability is described. The question of how this approach compares to single flow modelling and the additional or alternative requirements for dual flow modelling is examined via the following key areas; the specification of material handling requirements, tool transportation and issue and finally, the control required to examine the interaction between the two flows operating concurrently. The framework is tested for its industrial applicability via an industrial case study. A major aim of this study is to examine the view that a hybrid cell management strategy, competitive management, could outperform the other strategies examined. The aim of this methodology is to provide a solution for the control of FMCs. Emphasis is placed on the ease of control and how the loading and control rules selection can maximise economic enhancement of a cells performance
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