Frequency support characteristics of grid-interactive power converters based on the synchronous power controller

Grid-interactive converters with primary frequency control and inertia emulation have emerged and are promising for future renewable generation plants because of the contribution in power system stabilization. This paper gives a synchronous active power control solution for gridinteractive converters , as a way to emulate synchronous generators for inerita characteristics and load sharing. As design considerations, the virtual angle stability and transient response are both analyzed, and the detailed implementation structure is also given without entailing any difficulty in practice. The analytical and experimental validation of frequency support characteristics differentiates the work from other publications on generator emulation control. The 10 kW simulation and experimental frequency sweep tests on a regenerative source test bed present good performance of the proposed control in showing inertia and droop characteristics, as well as the controllable transient response.Peer ReviewedPostprint (author's final draft

A current-mode buck-boost DC-DC converter with fast transient response

A fast transient current-mode buckboost DC-DC converter for portable devices is presented. Running at 1 MHz the converter provides stable 3 V from a 2.7 V to 4.2 V Li-Ion battery. A small voltage under-/overshoot is achieved by fast transient techniques: (1) adaptive pulse skipping (APS) and (2) adaptive compensation capacitance (ACC). The proposed converter was implemented in a 0.25 μm CMOS technology. Load transient simulations confirm the effectiveness of APS and ACC. The improvement in voltage undershoot and response time at light-to-heavy load step (100 mA to 500 mA), are 17 % and 59 %, respectively, in boost mode and 40 % and 49 %, respectively, in buck mode. Similar results are achieved at heavy-to-light load step for overshoot and response time

System identification and adaptive current balancing ON/OFF control of DC-DC switch mode power converter

PhD ThesisReliability becomes more and more important in industrial application of Switch Mode Power Converters (SMPCs). A poorly performing power supply in a power system can influence its operation and potentially compromise the entire system performance in terms of efficiency. To maintain a high reliability, high performance SMPC effective control is necessary for regulating the output of the SMPC system. However, an uncertainty is a key factor in SMPC operation. For example, parameter variations can be caused by environmental effects such as temperature, pressure and humidity. Usually, fixed controllers cannot respond optimally and generate an effective signal to compensate the output error caused by time varying parameter changes. Therefore, the stability is potentially compromised in this case. To resolve this problem, increasing interest has been shown in employing online system identification techniques to estimate the parameter values in real time. Moreover, the control scheme applied after system identification is often called “adaptive control” due to the control signal selfadapting to the parameter variation by receiving the information from the system identification process. In system identification, the Recursive Least Square (RLS) algorithm has been widely used because it is well understood and easy to implement. However, despite the popularity of RLS, the high computational cost and slow convergence speed are the main restrictions for use in SMPC applications. For this reason, this research presents an alternative algorithm to RLS; Fast Affline Projection (FAP). Detailed mathematical analysis proves the superior computational efficiency of this algorithm. Moreover, simulation and experiment result verify this unique adaptive algorithm has improved performance in terms of computational cost and convergence speed compared with the conventional RLS methods. Finally, a novel adaptive control scheme is designed for optimal control of a DC-DC buck converter during transient periods. By applying the proposed adaptive algorithm, the control signal can be successfully employed to change the ON/OFF state of the power transistor in the DC-DC buck converter to improve the dynamic behaviour. Simulation and experiment result show the proposed adaptive control scheme significantly improves the transient response of the buck converter, particularly during an abrupt load change conditio

Improved Accuracy Area Efficient Hybrid CMOS/GaN DC-DC Buck Converterfor High Step-Down Ratio Applications

abstract: Point of Load (POL) DC-DC converters are increasingly used in space applications, data centres, electric vehicles, portable computers and devices and medical electronics. Heavy computing and processing capabilities of the modern devices have ushered the use of higher battery supply voltage to increase power storage. The need to address this consumer experience driven requirement has propelled the evolution of the next generation of small form-factor power converters which can operate with higher step down ratios while supplying heavy continuous load currents without sacrificing efficiency. Constant On-Time (COT) converter topology is capable of achieving stable operation at high conversion ratio with minimum off-chip components and small silicon area. This work proposes a Constant On-Time buck dc-dc converter for a wide dynamic input range and load currents from 100mA to 10A. Accuracy of this ripple based converter is improved by a unique voltage positioning technique which modulates the reference voltage to lower the average ripple profile close to the nominal output. Adaptive On-time block features a transient enhancement scheme to assist in faster voltage droop recovery when the output voltage dips below a defined threshold. UtilizingGallium Nitride (GaN) power switches enable the proposed converter to achieve very high efficiency while using smaller size inductor-capacitor (LC) power-stage. Use of novel Superjunction devices with higher drain-source blocking voltage simplifies the complex driver design and enables faster frequency of operation. It allows 1.8VComplementary Metal-Oxide Semiconductor (CMOS) devices to effectively drive GaNpower FETs which require 5V gate signal swing. The presented controller circuit uses internal ripple generation which reduces reliance on output cap equivalent series resistance (ESR) for loop stability and facilitates ripples reduction at the output. The ripple generation network is designed to provide ai optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions.Dissertation/ThesisMasters Thesis Electrical Engineering 201

Analysis And Design Optimization Of Multiphase Converter

Future microprocessors pose many challenges to the power conversion techniques. Multiphase synchronous buck converters have been widely used in high current low voltage microprocessor application. Design optimization needs to be carefully carried out with pushing the envelope specification and ever increasing concentration towards power saving features. In this work, attention has been focused on dynamic aspects of multiphase synchronous buck design. The power related issues and optimizations have been comprehensively investigated in this paper. In the first chapter, multiphase DC-DC conversion is presented with background application. Adaptive voltage positioning and various nonlinear control schemes are evaluated. Design optimization are presented to achieve best static efficiency over the entire load range. Power loss analysis from various operation modes and driver IC definition are studied thoroughly to better understand the loss terms and minimize the power loss. Load adaptive control is then proposed together with parametric optimization to achieve optimum efficiency figure. New nonlinear control schemes are proposed to improve the transient response, i.e. load engage and load release responses, of the multiphase VR in low frequency repetitive transient. Drop phase optimization and PWM transition from long tri-state phase are presented to improve the smoothness and robustness of the VR in mode transition. During high frequency repetitive transient, the control loop should be optimized and nonlinear loop should be turned off. Dynamic current sharing are thoroughly studied in chapter 4. The output impedance of the multiphase v synchronous buck are derived to assist the analysis. Beat frequency is studied and mitigated by proposing load frequency detection scheme by turning OFF the nonlinear loop and introducing current protection in the control loop. Dynamic voltage scaling (DVS) is now used in modern Multi-Core processor (MCP) and multiprocessor System-on-Chip (MPSoC) to reduce operational voltage under light load condition. With the aggressive motivation to boost dynamic power efficiency, the design specification of voltage transition (dv/dt) for the DVS is pushing the physical limitation of the multiphase converter design and the component stress as well. In this paper, the operation modes and modes transition during dynamic voltage transition are illustrated. Critical dead-times of driver IC design and system dynamics are first studied and then optimized. The excessive stress on the control MOSFET which increases the reliability concern is captured in boost mode operation. Feasible solutions are also proposed and verified by both simulation and experiment results. CdV/dt compensation for removing the AVP effect and novel nonlinear control scheme for smooth transition are proposed for dealing with fast voltage positioning. Optimum phase number control during dynamic voltage transition is also proposed and triggered by voltage identification (VID) delta to further reduce the dynamic loss. The proposed schemes are experimentally verified in a 200 W six phase synchronous buck converter. Finally, the work is concluded. The references are listed

Stability challenges and solutions in current-mode controlled power electronic converters

This dissertation focuses on stability issues in single-staged and multi-staged current controlled power electronic converters. Most current-mode control (CMC) approaches suffer from sub-harmonic oscillations. An external ramp is usually added to solve this problem. However, to guarantee stability this ramp has to be designed for the worst possible case which consequently over damps the response. Adaptive slope compensation (ASC) methods are the solution for this problem. In paper 1 of this dissertation, first three ASC methods will be investigated and analyzed through their small signal models. Then, through simulation analyses and experimental test of a variable-input voltage converter the results will be validated. Two of the methods studies in the first paper are peak CMC methods and the last one is called the projected cross point control (PCPC) approach. This method is relatively new. Therefore, a detailed discussion of the principles of operation of PCPC will be presented in paper 2. In addition, the small signal model of PCPC is developed and discussed through simulation and experimental analyses in the second paper of this dissertation. Peak, average, and hysteresis CMC schemes are used for comparison. In paper 3, the stability issues which arise in multistage converters will be addressed. A solid state transformer (SST) as an example of a multistage converter will be studied. A comprehensive small signal modeling will be conducted which helps for stability analysis of SST. Time domain simulations in Computer Aided Design software (PSCAD) are presented which validates the frequency domain analysis --Abstract, page iv

Efficient and Robust Simulation, Modeling and Characterization of IC Power Delivery Circuits

As the Moore’s Law continues to drive IC technology, power delivery has become one of the most difficult design challenges. Two of the major components in power delivery are DC-DC converters and power distribution networks, both of which are time-consuming to simulate and characterize using traditional approaches. In this dissertation, we propose a complete set of solutions to efficiently analyze DC-DC converters and power distribution networks by finding a perfect balance between efficiency and accuracy. To tackle the problem, we first present a novel envelope following method based on a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. By adopting three fast simulation techniques, our proposed method achieves higher speedup without comprising the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several DCDC converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several DC-DC converters with strong nonlinear switching characteristics. We then take another approach, average modeling, to enhance the efficiency of analyzing DC-DC converters. We proposed a multi-harmonic model that not only predicts the DC response but also captures the harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode and discontinuous conduction mode. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Based on the multi-harmonic averaged model, we further developed the small-signal model that provides a complete characterization of both DC averages and higher-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing the truthful characterization of the overall converter AC response and offers important guidance for converter design and closed-loop control. To address the problem of time-consuming simulation of power distribution networks, we present a partition-based iterative method by integrating block-Jacobi method with support graph method. The former enjoys the ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our proposed method, the circuit partitioning is guided by the maximum spanning tree of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partitionbased method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over a state-of-the-art direct solver

Adaptive prediction in digitally controlled buck converter with fast load transient response

An adaptive prediction scheme based on linear extrapolation for digitally controlled voltage-mode buck-type switching converter is presented. A major drawback of conventional digitally controlled switching converters is bandwidth limitation due to the additional phase lag in the digital feedback control loop. By predicting the future error voltage, the ADC sampling time delay is compensated in order to achieve a higher bandwidth even with a modest sampling rate. Both simulation and measurement results show that the output voltage settling time of the digitally controlled buck converter is reduced by as much as 28% with the proposed adaptive prediction. The fastest settling time in response to a 600mA load transient is around 15μs, approaching the transient response of the state-of-the-art analog-based controller.published_or_final_versio

Adaptive slope voltage control for distributed generation inverters with improved transient performance

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Reactive power injection in distributed generation inverters is an useful ancillary service for grid supporting purposes. For grid-feeding converters, the slope control method is the most common voltage regulation strategy used in local (communication-less) applications. Despite its simplicity, this method offers limited dynamic properties in scenarios with changing operation conditions. In this sense, this paper presents an adaptive slope voltage control which provides an improved transient performance against operating variations. To derive the control configuration, a control-oriented mathematical model is developed. The accuracy of the modeling and the performance of the proposed control are validated by selected experimental results.Peer ReviewedPostprint (author's final draft