Scalable macromodelling methodology for the efficient design of microwave filters

The complexity of the design of microwave filters increases steadily over the years. General design techniques available in literature yield relatively good initial designs, but electromagnetic (EM) optimisation is often needed to meet the specifications. Although interesting optimisation strategies exist, they depend on computationally expensive EM simulations. This makes the optimisation process time consuming. Moreover, brute force optimisation does not provide physical insights into the design and it is only applicable to one set of specifications. If the specifications change, the design and optimisation process must be redone. The authors propose a scalable macromodel-based design approach to overcome this. Scalable macromodels can be generated in an automated way. So far the inclusion of scalable macromodels in the design cycle of microwave filters has not been studied. In this study, it is shown that scalable macromodels can be included in the design cycle of microwave filters and re-used in multiple design scenarios at low computational cost. Guidelines to properly generate and use scalable macromodels in a filter design context are given. The approach is illustrated on a state-of-the-art microstrip dual-band bandpass filter with closely spaced pass bands and a complex geometrical structure. The results confirm that scalable macromodels are proper design tools and a valuable alternative to a computationally expensive EM simulator-based design flow

Signal and System Design for Wireless Power Transfer : Prototype, Experiment and Validation

A new line of research on communications and signals design for Wireless Power Transfer (WPT) has recently emerged in the communication literature. Promising signal strategies to maximize the power transfer efficiency of WPT rely on (energy) beamforming, waveform, modulation and transmit diversity, and a combination thereof. To a great extent, the study of those strategies has so far been limited to theoretical performance analysis. In this paper, we study the real over-the-air performance of all the aforementioned signal strategies for WPT. To that end, we have designed, prototyped and experimented an innovative radiative WPT architecture based on Software-Defined Radio (SDR) that can operate in open-loop and closed-loop (with channel acquisition at the transmitter) modes. The prototype consists of three important blocks, namely the channel estimator, the signal generator, and the energy harvester. The experiments have been conducted in a variety of deployments, including frequency flat and frequency selective channels, under static and mobility conditions. Experiments highlight that a channeladaptive WPT architecture based on joint beamforming and waveform design offers significant performance improvements in harvested DC power over conventional single-antenna/multiantenna continuous wave systems. The experimental results fully validate the observations predicted from the theoretical signal designs and confirm the crucial and beneficial role played by the energy harvester nonlinearity.Comment: Accepted to IEEE Transactions on Wireless Communication

Interpolation-based parameterized model order reduction of delayed systems

Three-dimensional electromagnetic methods are fundamental tools for the analysis and design of high-speed systems. These methods often generate large systems of equations, and model order reduction (MOR) methods are used to reduce such a high complexity. When the geometric dimensions become electrically large or signal waveform rise times decrease, time delays must be included in the modeling. Design space optimization and exploration are usually performed during a typical design process that consequently requires repeated simulations for different design parameter values. Efficient performing of these design activities calls for parameterized model order reduction (PMOR) methods, which are able to reduce large systems of equations with respect to frequency and other design parameters of the circuit, such as layout or substrate features. We propose a novel PMOR method for neutral delayed differential systems, which is based on an efficient and reliable combination of univariate model order reduction methods, a procedure to find scaling and frequency shifting coefficients and positive interpolation schemes. The proposed scaling and frequency shifting coefficients enhance and improve the modeling capability of standard positive interpolation schemes and allow accurate modeling of highly dynamic systems with a limited amount of initial univariate models in the design space. The proposed method is able to provide parameterized reduced order models passive by construction over the design space of interest. Pertinent numerical examples validate the proposed PMOR approach

Polarization Decomposition Algorithm for Detection Efficiency Enhancement

In the paper, a new polarization decomposition of the optimal detection algorithm in the partially homogeneous environment is presented. Firstly, the detectors Matched Subspace Detector (MSD) and Adaptive Subspace Detector (ASD) are adopted to deal with detection problems in the partially homogeneous environment. Secondly, the fitness function with polarization parameters is equivalently decomposed to enhance time detection efficiency in the algorithm. It makes the multiplication number of the fitness function from square to a linear increase along with the increase in parameters. Simulation results indicate that the proposed decomposition is much more efficient than direct use of the fitness function

High-Performance Passive Macromodeling Algorithms for Parallel Computing Platforms

This paper presents a comprehensive strategy for fast generation of passive macromodels of linear devices and interconnects on parallel computing hardware. Starting from a raw characterization of the structure in terms of frequency-domain tabulated scattering responses, we perform a rational curve fitting and a postprocessing passivity enforcement. Both algorithms are parallelized and cast in a form that is suitable for deployment on shared-memory multicore platforms. Particular emphasis is placed on the passivity characterization step, which is performed using two complementary strategies. The first uses an iterative restarted and deflated rational Arnoldi process to extract the imaginary Hamiltonian eigenvalues associated with the model. The second is based on an accuracy-controlled adaptive sampling. Various parallelization strategies are discussed for both schemes, with particular care on load balancing between different computing threads and memory occupation. The resulting parallel macromodeling flow is demonstrated on a number of medium- and large-scale structures, showing good scalability up to 16 computational core

Channel Characterization for Chip-scale Wireless Communications within Computing Packages

Wireless Network-on-Chip (WNoC) appears as a promising alternative to conventional interconnect fabrics for chip-scale communications. WNoC takes advantage of an overlaid network composed by a set of millimeter-wave antennas to reduce latency and increase throughput in the communication between cores. Similarly, wireless inter-chip communication has been also proposed to improve the information transfer between processors, memory, and accelerators in multi-chip settings. However, the wireless channel remains largely unknown in both scenarios, especially in the presence of realistic chip packages. This work addresses the issue by accurately modeling flip-chip packages and investigating the propagation both its interior and its surroundings. Through parametric studies, package configurations that minimize path loss are obtained and the trade-offs observed when applying such optimizations are discussed. Single-chip and multi-chip architectures are compared in terms of the path loss exponent, confirming that the amount of bulk silicon found in the pathway between transmitter and receiver is the main determinant of losses.Comment: To be presented 12th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2018); Torino, Italy; October 201