Zuverlässige und Energieeffiziente gemischt-kritische Echtzeit On-Chip Systeme

Multi- and many-core embedded systems are increasingly becoming the target for many applications that require high performance under varying conditions. A resulting challenge is the control, and reliable operation of such complex multiprocessing architectures under changes, e.g., high temperature and degradation. In mixed-criticality systems where many applications with varying criticalities are consolidated on the same execution platform, fundamental isolation requirements to guarantee non-interference of critical functions are crucially important. While Networks-on-Chip (NoCs) are the prevalent solution to provide scalable and efficient interconnects for the multiprocessing architectures, their associated energy consumption has immensely increased. Specifically, hard real-time NoCs must manifest limited energy consumption as thermal runaway in such a core shared resource jeopardizes the whole system guarantees. Thus, dynamic energy management of NoCs, as opposed to the related work static solutions, is highly necessary to save energy and decrease temperature, while preserving essential temporal requirements. In this thesis, we introduce a centralized management to provide energy-aware NoCs for hard real-time systems. The design relies on an energy control network, developed on top of an existing switch arbitration network to allow isolation between energy optimization and data transmission. The energy control layer includes local units called Power-Aware NoC controllers that dynamically optimize NoC energy depending on the global state and applications’ temporal requirements. Furthermore, to adapt to abnormal situations that might occur in the system due to degradation, we extend the concept of NoC energy control to include the entire system scope. That is, online resource management employing hierarchical control layers to treat system degradation (imminent core failures) is supported. The mechanism applies system reconfiguration that involves workload migration. For mixed-criticality systems, it allows flexible boundaries between safety-critical and non-critical subsystems to safely apply the reconfiguration, preserving fundamental safety requirements and temporal predictability. Simulation and formal analysis-based experiments on various realistic usecases and benchmarks are conducted showing significant improvements in NoC energy-savings and in treatment of system degradation for mixed-criticality systems improving dependability over the status quo.Eingebettete Many- und Multi-core-Systeme werden zunehmend das Ziel für Anwendungen, die hohe Anfordungen unter unterschiedlichen Bedinungen haben. Für solche hochkomplexed Multi-Prozessor-Systeme ist es eine grosse Herausforderung zuverlässigen Betrieb sicherzustellen, insbesondere wenn sich die Umgebungseinflüsse verändern. In Systeme mit gemischter Kritikalität, in denen viele Anwendungen mit unterschiedlicher Kritikalität auf derselben Ausführungsplattform bedient werden müssen, sind grundlegende Isolationsanforderungen zur Gewährleistung der Nichteinmischung kritischer Funktionen von entscheidender Bedeutung. Während On-Chip Netzwerke (NoCs) häufig als skalierbare Verbindung für die Multiprozessor-Architekturen eingesetzt werden, ist der damit verbundene Energieverbrauch immens gestiegen. Daher sind dynamische Plattformverwaltungen, im Gegensatz zu den statischen, zwingend notwendig, um ein System an die oben genannten Veränderungen anzupassen und gleichzeitig Timing zu gewährleisten. In dieser Arbeit entwickeln wir energieeffiziente NoCs für harte Echtzeitsysteme. Das Design basiert auf einem Energiekontrollnetzwerk, das auf einem bestehenden Switch-Arbitration-Netzwerk entwickelt wurde, um eine Isolierung zwischen Energieoptimierung und Datenübertragung zu ermöglichen. Die Energiesteuerungsschicht umfasst lokale Einheiten, die als Power-Aware NoC-Controllers bezeichnet werden und die die NoC-Energie in Abhängigkeit vom globalen Zustand und den zeitlichen Anforderungen der Anwendungen optimieren. Darüber hinaus wird das Konzept der NoC-Energiekontrolle zur Anpassung an Anomalien, die aufgrund von Abnutzung auftreten können, auf den gesamten Systemumfang ausgedehnt. Online- Ressourcenverwaltungen, die hierarchische Kontrollschichten zur Behandlung Abnutzung (drohender Kernausfälle) einsetzen, werden bereitgestellt. Bei Systemen mit gemischter Kritikalität erlaubt es flexible Grenzen zwischen sicherheitskritischen und unkritischen Subsystemen, um die Rekonfiguration sicher anzuwenden, wobei grundlegende Sicherheitsanforderungen erhalten bleiben und Timing Vorhersehbarkeit. Experimente werden auf der Basis von Simulationen und formalen Analysen zu verschiedenen realistischen Anwendungsfallen und Benchmarks durchgeführt, die signifikanten Verbesserungen bei On-Chip Netzwerke-Energieeinsparungen und bei der Behandlung von Abnutzung für Systeme mit gemischter Kritikalität zur Verbesserung die Systemstabilität gegenüber dem bisherigen Status quo zeigen

Dependable Embedded Systems

This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems

Active timing margin management to improve microprocessor power efficiency

Improving power/performance efficiency is critical for today’s micro- processors. From edge devices to datacenters, lower power or higher performance always produces better systems, measured by lower cost of ownership or longer battery time. This thesis studies improving microprocessor power/performance efficiency by optimizing the pipeline timing margin. In particular, this thesis focuses on improving the efficacy of Active Timing Margin, a young technology that dynamically adjusts the margin. Active timing margin trims down the pipeline timing margin with a control loop that adjusts voltage and frequency based on real-time chip environment monitoring. The key insight of this thesis is that in order to maximize active timing margin’s efficiency enhancement benefits, synergistic management from processor architecture design and system software scheduling are needed. To that end, this thesis covers the major consumers of pipeline timing margin, including temperature, voltage, and process variation. For temperature variation, the thesis proposes a table-lookup based active timing margin mechanism, and an associated temperature management scheme to minimize power consumption. For voltage variation, the thesis characterizes the limiting factors of adaptive clocking’s power saving and proposes application scheduling to maximize total system power reduction. For process variation, the thesis proposes core-level adaptive clocking reconfiguration to automatically expose inter-core variation and discusses workload scheduling and throttling management to control critical application performance. The author believes the optimization presented in this thesis can potentially benefit a variety of processor architectures as the conclusions are based on the solid measurement on state-of-the-art processors, and the research objective, active timing margin, already has wide applicability in the latest microprocessors by the time this thesis is written.Electrical and Computer Engineerin

CROSS-LAYER DESIGN, OPTIMIZATION AND PROTOTYPING OF NoCs FOR THE NEXT GENERATION OF HOMOGENEOUS MANY-CORE SYSTEMS

This thesis provides a whole set of design methods to enable and manage the runtime heterogeneity of features-rich industry-ready Tile-Based Networkon- Chips at different abstraction layers (Architecture Design, Network Assembling, Testing of NoC, Runtime Operation). The key idea is to maintain the functionalities of the original layers, and to improve the performance of architectures by allowing, joint optimization and layer coordinations. In general purpose systems, we address the microarchitectural challenges by codesigning and co-optimizing feature-rich architectures. In application-specific NoCs, we emphasize the event notification, so that the platform is continuously under control. At the network assembly level, this thesis proposes a Hold Time Robustness technique, to tackle the hold time issue in synchronous NoCs. At the network architectural level, the choice of a suitable synchronization paradigm requires a boost of synthesis flow as well as the coexistence with the DVFS. On one hand this implies the coexistence of mesochronous synchronizers in the network with dual-clock FIFOs at network boundaries. On the other hand, dual-clock FIFOs may be placed across inter-switch links hence removing the need for mesochronous synchronizers. This thesis will study the implications of the above approaches both on the design flow and on the performance and power quality metrics of the network. Once the manycore system is composed together, the issue of testing it arises. This thesis takes on this challenge and engineers various testing infrastructures. At the upper abstraction layer, the thesis addresses the issue of managing the fully operational system and proposes a congestion management technique named HACS. Moreover, some of the ideas of this thesis will undergo an FPGA prototyping. Finally, we provide some features for emerging technology by characterizing the power consumption of Optical NoC Interfaces

when channels cooperate or capacitance varies

Die elektrische Signalverarbeitung in Nervenzellen basiert auf deren erregbarer Zellmembran. Üblicherweise wird angenommen, dass die in der Membran eingebetteten leitfähigen Ionenkanäle nicht auf direkte Art gekoppelt sind und dass die Kapazität des von der Membran gebildeten Kondensators konstant ist. Allerdings scheinen diese Annahmen nicht für alle Nervenzellen zu gelten. Im Gegenteil, verschiedene Ionenkanäle “kooperieren” und auch die Vorstellung von einer konstanten spezifischen Membrankapazität wurde kürzlich in Frage gestellt. Die Auswirkungen dieser Abweichungen auf die elektrischen Eigenschaften von Nervenzellen ist das Thema der folgenden kumulativen Dissertationsschrift. Im ersten Projekt wird gezeigt, auf welche Weise stark kooperative spannungsabhängige Ionenkanäle eine Form von zellulärem Kurzzeitspeicher für elektrische Aktivität bilden könnten. Solche kooperativen Kanäle treten in der Membran häufig in kleinen räumlich getrennte Clustern auf. Basierend auf einem mathematischen Modell wird nachgewiesen, dass solche Kanalcluster als eine bistabile Leitfähigkeit agieren. Die dadurch entstehende große Speicherkapazität eines Ensembles dieser Kanalcluster könnte von Nervenzellen für stufenloses persistentes Feuern genutzt werden -- ein Feuerverhalten von Nutzen für das Kurzzeichgedächtnis. Im zweiten Projekt wird ein neues Dynamic Clamp Protokoll entwickelt, der Capacitance Clamp, das erlaubt, Änderungen der Membrankapazität in biologischen Nervenzellen zu emulieren. Eine solche experimentelle Möglichkeit, um systematisch die Rolle der Kapazität zu untersuchen, gab es bisher nicht. Nach einer Reihe von Tests in Simulationen und Experimenten wurde die Technik mit Körnerzellen des *Gyrus dentatus* genutzt, um den Einfluss von Kapazität auf deren Feuerverhalten zu studieren. Die Kombination beider Projekte zeigt die Relevanz dieser oft vernachlässigten Facetten von neuronalen Membranen für die Signalverarbeitung in Nervenzellen.Electrical signaling in neurons is shaped by their specialized excitable cell membranes. Commonly, it is assumed that the ion channels embedded in the membrane gate independently and that the electrical capacitance of neurons is constant. However, not all excitable membranes appear to adhere to these assumptions. On the contrary, ion channels are observed to gate cooperatively in several circumstances and also the notion of one fixed value for the specific membrane capacitance (per unit area) across neuronal membranes has been challenged recently. How these deviations from the original form of conductance-based neuron models affect their electrical properties has not been extensively explored and is the focus of this cumulative thesis. In the first project, strongly cooperative voltage-gated ion channels are proposed to provide a membrane potential-based mechanism for cellular short-term memory. Based on a mathematical model of cooperative gating, it is shown that coupled channels assembled into small clusters act as an ensemble of bistable conductances. The correspondingly large memory capacity of such an ensemble yields an alternative explanation for graded forms of cell-autonomous persistent firing – an observed firing mode implicated in working memory. In the second project, a novel dynamic clamp protocol -- the capacitance clamp -- is developed to artificially modify capacitance in biological neurons. Experimental means to systematically investigate capacitance, a basic parameter shared by all excitable cells, had previously been missing. The technique, thoroughly tested in simulations and experiments, is used to monitor how capacitance affects temporal integration and energetic costs of spiking in dentate gyrus granule cells. Combined, the projects identify computationally relevant consequences of these often neglected facets of neuronal membranes and extend the modeling and experimental techniques to further study them

Techniques for Managing Grid Vulnerability and Assessing Structure

As power systems increasingly rely on renewable power sources, generation fluctuations play a greater role in operation. These unpredictable changes shift the system operating point, potentially causing transmission lines to overheat and sag. Any attempt to anticipate line thermal constraint violations due to renewable generation shifts must address the temporal nature of temperature dynamics, as well as changing ambient conditions. An algorithm for assessing vulnerability in an operating environment should also have solution guarantees, and scale well to large systems. A method for quantifying and responding to system vulnerability to renewable generation fluctuations is presented. In contrast to existing methods, the proposed temporal framework captures system changes and line temperature dynamics over time. The non-convex quadratically constrained quadratic program (QCQP) associated with this temporal framework may be reliably solved via a proposed series of transformations. Case studies demonstrate the method's effectiveness for anticipating line temperature constraint violations due to small shifts in renewable generation. The method is also useful for quickly identifying optimal generator dispatch adjustments for cooling an overheated line, making it well-suited for use in power system operation. Development and testing of the temporal deviation scanning method involves time series data and system structure. Time series data are widely available, but publicly available data are often synthesized. Well-known time series analysis techniques are used to assess whether given data are realistic. Bounds from signal processing literature are used to identify, characterize, and isolate the quantization noise that exists in many commonly-used electric load profile datasets. Just as straightforward time series analysis can detect unrealistic data and quantization noise, so graph theory may be employed to identify unrealistic features of transmission networks. A small set of unweighted graph metrics is used on a large set of test networks to reveal unrealistic connectivity patterns in transmission grids. These structural anomalies often arise due to network reduction, and are shown to exist in multiple publicly available test networks. The aforementioned study of system structure suggested a means of improving the performance of algorithms that solve the semidefinite relaxation of the optimal power flow problem (SDP OPF). It is well known that SDP OPF performance improves when the semidefinite constraint is decomposed along the lines of the maximal cliques of the underlying network graph. Further improvement is possible by merging some cliques together, trading off between the number of decomposed constraints and their sizes. Potential for improvement over the existing greedy clique merge algorithm is shown. A comparison of clique merge algorithms demonstrates that approximate problem size may not be the most important consideration when merging cliques. The last subject of interest is the ubiquitous load-tap-changing (LTC) transformer, which regulates voltage in response to changes in generation and load. Unpredictable and significant changes in wind cause LTCs to tap more frequently, reducing their lifetimes. While voltage regulation at renewable sites can resolve this issue for nearby sub-transmission LTCs, upstream transmission-level LTCs must then tap more to offset the reactive power flows that result. A simple test network is used to illustrate this trade-off between transmission LTC and sub-transmission LTC tap operations as a function of wind-farm voltage regulation and device setpoints. The trade-off calls for more nuanced voltage regulation policies that balance tap operations between LTCs.PHDElectrical Engineering: SystemsUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/155266/1/kersulis_1.pd

A Comprehensive Method For Coordinating Distributed Energy Resources In A Power Distribution System

Utilities, faced with increasingly limited resources, strive to maintain high levels of reliability in energy delivery by adopting improved methodologies in planning, operation, construction and maintenance. On the other hand, driven by steady research and development and increase in sales volume, the cost of deploying PV systems has been in constant decline since their first introduction to the market. The increased level of penetration of distributed energy resources in power distribution infrastructure presents various benefits such as loss reduction, resilience against cascading failures and access to more diversified resources. However, serious challenges and risks must be addressed to ensure continuity and reliability of service. By integrating necessary communication and control infrastructure into the distribution system, to develop a practically coordinated system of distributed resources, controllable load/generation centers will be developed which provide substantial flexibility for the operation of the distribution system. On the other hand, such a complex distributed system is prone to instability and black outs due to lack of a major infinite supply and other unpredicted variations in load and generation, which must be addressed. To devise a comprehensive method for coordination between Distributed Energy Resources in order to achieve a collective goal, is the key point to provide a fully functional and reliable power distribution system incorporating distributed energy resources. A road map to develop such comprehensive coordination system is explained and supporting scenarios and their associated simulation results are then elaborated. The proposed road map describes necessary steps to build a comprehensive solution for coordination between multiple agents in a microgrid or distribution feeder.\u2