Efficient Solving of Quantified Inequality Constraints over the Real Numbers

Let a quantified inequality constraint over the reals be a formula in the first-order predicate language over the structure of the real numbers, where the allowed predicate symbols are $\leq$ and $<$. Solving such constraints is an undecidable problem when allowing function symbols such $\sin$ or $\cos$. In the paper we give an algorithm that terminates with a solution for all, except for very special, pathological inputs. We ensure the practical efficiency of this algorithm by employing constraint programming techniques

Intelligent Splitting for Disjunctive Numerical CSPs

International audienceDisjunctions in numerical CSPs appear in applications such as Design, Biology or Control. Generalized solving techniques have been proposed to handle these disjunctions in a Branch&Prune fashion. However, they focus essentially on the pruning operation. In this paper, we present experimental evidences that significant performance gains can be expected by exploiting the disjunctions in the branching operation

Deciding Predicate Logical Theories of Real-Valued Functions

The notion of a real-valued function is central to mathematics, computer science, and many other scientific fields. Despite this importance, there are hardly any positive results on decision procedures for predicate logical theories that reason about real-valued functions. This paper defines a first-order predicate language for reasoning about multi-dimensional smooth real-valued functions and their derivatives, and demonstrates that - despite the obvious undecidability barriers - certain positive decidability results for such a language are indeed possible

Deciding Predicate Logical Theories Of Real-Valued Functions

The notion of a real-valued function is central to mathematics, computer science, and many other scientific fields. Despite this importance, there are hardly any positive results on decision procedures for predicate logical theories that reason about real-valued functions. This paper defines a first-order predicate language for reasoning about multi-dimensional smooth real-valued functions and their derivatives, and demonstrates that - despite the obvious undecidability barriers - certain positive decidability results for such a language are indeed possible

Integrating Abstraction Techniques for Formal Verification of Analog Designs

The verification of analog designs is a challenging and exhaustive task that requires deep understanding of physical behaviours. In this paper, we propose a qualitative based predicate abstraction method for the verification of a class of non-linear analog circuits. In the proposed method, system equations are automatically extracted from a circuit diagram by means of a bond graph. Verification is applied based on combining techniques from constraint solving and computer algebra along with symbolic model checking. Our methodology has the advantage of avoiding exhaustive simulation normally encountered in the verification of analog designs. To this end, we have used Dymola, Hsolver, SMV and Mathematica to implement the verification flow. We illustrate the methodology on several analog examples including Colpitts and tunnel diode oscillators

Integrating Abstraction Techniques for Formal Verification of Analog Designs

The verification of analog designs is a challenging and exhaustive task that requires deep understanding of physical behaviours. In this paper, we propose a qualitative based predicate abstraction method for the verification of a class of non-linear analog circuits. In the proposed method, system equations are automatically extracted from a circuit diagram by means of a bond graph. Verification is applied based on combining techniques from constraint solving and computer algebra along with symbolic model checking. Our methodology has the advantage of avoiding exhaustive simulation normally encountered in the verification of analog designs. To this end, we have used Dymola, Hsolver, SMV and Mathematica to implement the verification flow. We illustrate the methodology on several analog examples including Colpitts and tunnel diode oscillators

Formal verification of bond graph modelled analogue circuits

Analogue circuits are an increasingly critical component in embedded system designs. Traditionally, simulation is used for verification, but owing to the infinite state space of analogue components, the 100% correctness of a design cannot be guaranteed. Formal methods, based around applying mathematical expressions and reasoning to prove correctness, have been developed to increase the verification confidence level. This study introduces and demonstrates a methodology for formally verifying safety properties of analogue circuits. In the proposed approach, system equations are automatically extracted from a SPICE netlist by means of energy-conservative bond graph models. Verification based on abstract model checking and constraint solving is then applied on the extracted equation models. The authors methodology avoids an exhaustive and time demanding simulation that is normally encountered during analogue circuit verification. To this end, the authors have used a set of tools to implement the proposed verification flow and applied it on tunnel diode, Chua and Colpitts oscillators as case studies

Contribution à l'élaboration d'un formalisme gérant la pertinence pour les problèmes d'aide à la conception à base de contraintes

Les travaux présentés dans cette thèse portent sur l'aide à la conception et à la configuration. Une intégration de différents concepts existant dans les domaines de la programmation par contraintes a été réalisée. Cette intégration a pu être testée sur une implémentation basée sur des arbres syntaxiques représentant un CSP (problème de satisfaction de contraintes) modélisant un problème de conception ou configuration. La première partie de la thèse présente les domaines de la conception et de la configuration, et en fait ressortir les besoins pour l'aide à la décision : paramètres discrets et continus, organisation hiérarchique et éléments optionnels. Différentes approches à base de contraintes permettant de répondre à ces besoins sont ensuite détaillées. La seconde partie présente les RCSP (CSP gérant la pertinence), qui intègrent les différents mécanismes vus dans la première partie. Des préconisations de modélisation pour les problèmes de conception et de configuration sont établies. L'outil réalisé est ensuite présenté, dans un premier temps pour le traitement de problèmes CSP et dans un deuxième temps pour le traitement de RCSP