Comprehensive Modeling and Experimental Testing of Fault Detection and Management of a Nonredundant Fault-Tolerant VSI

This paper presents an investigation and a comprehensive analysis on fault operations in a conventional three-phase voltage source inverter. After an introductory section dealing with power converter reliability and fault analysis issues in power electronics, a generalized switching function accounting for both healthy and faulty conditions and an easy and feasible method to embed fault diagnosis and reconfiguration within the control algorithm are introduced. The proposed system has simple and compact implementation. Experimental results operating both at open- and closed-loop current control, obtained using a test bench realized using a dSPACE system and the fault-tolerant inverter prototype demonstrate that the proposed solution is effective and feasible and makes all faults easily managed by the controller itself

Fault-tolerant computer study

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed

Modelling, Diagnosis, and Fault-Tolerant Control of Open-Circuit Faults in Three-Phase Two-Level PMSM Drives

Attributing to the high efficiency, compact structure, and rapid dynamics, powertrains utilizing Permanent Magnet Synchronous Motors (PMSM) have emerged as a promising alternative and have seen extensive deployment in various industrial and transportation sectors, including electric vehicles (EVs), more-electric aircraft, and robotics. Despite ongoing interest in advanced redundant topologies for PMSM drives from both academia and industry, the three-phase two-level (3P2L) PMSM drive continues to dominate the majority of the electric drive market. However, when compared to its multi-phase counterparts, the most-commonly used 3P2L PMSM drive exhibits limited reliability and fault tolerance capabilities, particularly in safety-critical or cost-sensitive scenarios. Therefore, the development of embedded reliability-enhancing techniques holds great significance in enhancing the safety and maintenance of on-site powertrains based on the 3P2L PMSM drive. The purposes of this study are to investigate post-fault system models and develop hardwarefree fault diagnostic and fault-tolerant methods that can be conveniently integrated into existing 3P2L PMSM drives. Special attention is dedicated to the open-circuit fault, as it represents one of the ultimate consequences of fault propagation in PMSM drives. In the first place, the fault propagation from component failures to open-circuit faults is analyzed, and the existing literature on the modelling, diagnosis, and fault-tolerant control of PMSM drives is comprehensively reviewed. Subsequently, the study delves into the postfault system model under the open-phase (OP) fault, which includes the examination of postfault phase voltages and current prediction. Based on the phase voltages observed under the OP fault, a phenomenon of particular interest is modelled: the remaining current that flows through the free-wheeling diodes of the faulty phase under the open-switch (OS) fault. The conduction mechanism is elucidated, and a real-time estimation model is established. Furthermore, a sampling method is designed to enable the motor drive to detect the remaining current in the OS phase, along with a set of diagnostic rules to distinguish between OS and OP faults. Finally, an embedded fault-tolerant control method is introduced to enhance the post-fault speed and torque outputs of 3P2L PMSM drives

Benefits assessment of active control technology and related cockpit technology for rotorcraft

Two main-rotor active control concepts, one incorporating multicyclic actuators located just below the swashplate, and the other providing for the actuators and power supplies to be located in the rotating frame are considered. Each design concept is integrated with cockpit controllers and displays appropriate to the actuation concept in each case. The benefits of applying the defined ACT/RCT concepts to rotorcraft are quantified by comparison to the baseline model 412 helicopter. These benefits include, in the case of one active control concept; (1) up to 91% reduction in 4/rev hub shears; (2) a flight safety failure rate of 1.96 x 10 to the 8th power failures per flight-hour; (3) rotating controls/rotor hub drag reduction of 40%; (4) a 9% reduction in control system weight; and (5) vibratory deicing. The related cockpit concept reduces pilot workload for critical mission segments as much as 178% visual and 25% manual

Contributions to the design of power modules for electric and hybrid vehicles: trends, design aspects and simulation techniques

314 p.En la última década, la protección del medio ambiente y el uso alternativo de energías renovables están tomando mayor relevancia tanto en el ámbito social y político, como científico. El sector del transporte es uno de los principales causantes de los gases de efecto invernadero y la polución existente, contribuyendo con hasta el 27 % de las emisiones a nivel global. En este contexto desfavorable, la electrificación de los vehículos de carretera se convierte en un factor crucial. Para ello, la transición de la actual flota de vehículos de carretera debe ser progresiva forzando la investigación y desarrollo de nuevos conceptos a la hora de producir vehículos eléctricos (EV) y vehículos eléctricos híbridos (HEV) más eficientes, fiables, seguros y de menor coste. En consecuencia, para el desarrollo y mejora de los convertidores de potencia de los HEV/EV, este trabajo abarca los siguientes aspectos tecnológicos: - Arquitecturas de la etapa de conversión de potencia. Las principales topologías que pueden ser implementadas en el tren de potencia para HEV/EV son descritas y analizadas, teniendo en cuenta las alternativas que mejor se adaptan a los requisitos técnicos que demandan este tipo de aplicaciones. De dicha exposición se identifican los elementos constituyentes fundamentales de los convertidores de potencia que forman parte del tren de tracción para automoción.- Nuevos dispositivos semiconductores de potencia. Los nuevos objetivos y retos tecnológicos solo pueden lograrse mediante el uso de nuevos materiales. Los semiconductores Wide bandgap (WBG), especialmente los dispositivos electrónicos de potencia basados en nitruro de galio (GaN) y carburo de silicio (SiC), son las alternativas más prometedoras al silicio (Si) debido a las mejores prestaciones que poseen dichos materiales, lo que permite mejorar la conductividad térmica, aumentar las frecuencias de conmutación y reducir las pérdidas.- Análisis de técnicas de rutado, conexionado y ensamblado de módulos de potencia. Los módulos de potencia fabricados con dies en lugar de dispositivos discretos son la opción preferida por los fabricantes para lograr las especificaciones indicadas por la industria de la automoción. Teniendo en cuenta los estrictos requisitos de eficiencia, fiabilidad y coste es necesario revisar y plantear nuevos layouts de las etapas de conversión de potencia, así como esquemas y técnicas de paralelización de los circuitos, centrándose en las tecnologías disponibles.Teniendo en cuenta dichos aspectos, la presente investigación evalúa las alternativas de semiconductores de potencia que pueden ser implementadas en aplicaciones HEV/EV, así como su conexionado para la obtención de las densidades de potencia requeridas, centrándose en la técnica de paralelización de semiconductores. Debido a la falta de información tanto científica como comercial e industrial sobre dicha técnica, una de las principales contribuciones del presente trabajo ha sido la propuesta y verificación de una serie de criterios de diseño para el diseño de módulos de potencia. Finalmente, los resultados que se han extraído de los circuitos de potencia propuestos demuestran la utilidad de dichos criterios de diseño, obteniendo circuitos con bajas impedancias parásitas y equilibrados eléctrica y térmicamente. A nivel industrial, el conocimiento expuesto en la presente tesis permite reducir los tiempos de diseño a la hora de obtener prototipos de ciertas garantías, permitiendo comenzar la fase de prototipado habiéndose realizado comprobaciones eléctricas y térmicas

Development of a multilevel converter topology for transformer-less connection of renewable energy systems

The global need to reduce dependence on fossil fuels for electricity production has become an ongoing research theme in the last decade. Clean energy sources (such as wind energy and solar energy) have considerable potential to reduce reliance on fossil fuels and mitigate climate change. However, wind energy is going to become more mainstream due to technological advancement and geographical availability. Therefore, various technologies exist to maximize the inherent advantages of using wind energy conversion systems (WECSs) to generate electrical power. One important technology is the power electronics interface that enables the transfer and effective control of electrical power from the renewable energy source to the grid through the filter and isolation transformer. However, the transformer is bulky, generates losses, and is also very costly. Therefore, the term "transformer-less connection" refers to eliminating a step-up transformer from the WECS, while the power conversion stage performs the conventional functions of a transformer. Existing power converter configurations for transformer-less connection of a WECS are either based on the generator-converter configuration or three-stage power converter configuration. These configurations consist of conventional multilevel converter topologies and two-stage power conversion between the generator-side converter topology and the high-order filter connected to the collection point of the wind power plant (WPP). Thus, the complexity and cost of these existing configurations are significant at higher voltage and power ratings. Therefore, a single-stage multilevel converter topology is proposed to simplify the power conversion stage of a transformer-less WECS. Furthermore, the primary design challenges – such as multiple clamping devices, multiple dc-link capacitors, and series-connected power semiconductor devices – have been mitigated by the proposed converter topology. The proposed converter topology, known as the "tapped inductor quasi-Z-source nested neutral-point-clamped (NNPC) converter," has been analyzed, and designed, and a prototype of the topology developed for experimental verification. A field-programmable gate array (FPGA)-based modulation technique and voltage balancing control technique for maintaining the clamping capacitor voltages was developed. Hence, the proposed converter topology presents a single-stage power conversion configuration. Efficiency analysis of the proposed converter topology has been studied and compared to the intermediate and grid-side converter topology of a three-stage power converter configuration. A direct current (DC) component minimization technique to minimize the dc component generated by the proposed converter topology was investigated, developed, and verified experimentally. The proposed dc component minimization technique consists of a sensing and measurement circuitry with a digital notch filter. This thesis presents a detailed and comprehensive overview of the existing power converter configurations developed for transformer-less WECS applications. Based on the developed 2 comparative benchmark factor (CBF), the merits and demerits of each power converter configuration in terms of the component counts and grid compliance have been presented. In terms of cost comparison, the three-stage power converter configuration is more cost-effective than the generatorconverter configuration. Furthermore, the cost-benefit analysis of deploying a transformer-less WECSs in a WPP is evaluated and compared with conventional WECS in a WPP based on power converter configurations and collection system. Overall, the total cost of the collection system of WPP with transformer-less WECSs is about 23% less than the total cost of WPP with conventional WECs. The derivation and theoretical analysis of the proposed five-level tapped inductor quasi-Z-source NNPC converter topology have been presented, emphasizing its operating principles, steady-state analysis, and deriving equations to calculate its inductance and capacitance values. Furthermore, the FPGA implementation of the proposed converter topology was verified experimentally with a developed prototype of the topology. The efficiency of the proposed converter topology has been evaluated by varying the switching frequency and loads. Furthermore, the proposed converter topology is more efficient than the five-level DC-DC converter with a five-level diode-clamped converter (DCC) topology under the three-stage power converter configuration. Also, the cost analysis of the proposed converter topology and the conventional converter topology shows that it is more economical to deploy the proposed converter topology at the grid side of a transformer-less WECS

ATS-6 engineering performance report. Volume 3: Telecommunications and power

Functional design requirements and in-orbit operations, performance, and anomalies are discussed for (1) the communications subsystem, (2) the electrical power system, and (3) the telemetry and command subsystem. The latter includes a review of ground support. Tracking and data relay experiments and the Apollo-Soyuz test program are reviewed