Experimental study of artificial neural networks using a digital memristor simulator

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.This paper presents a fully digital implementation of a memristor hardware simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field programmable gate array (FPGA) families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks (ANNs), implementing examples of associative memory and unsupervised learning of spatio-temporal correlations in parallel input streams using a simplified STDP. We provide the full circuit schematics of all our digital circuit designs and comment on the required hardware resources and their scaling trends, thus presenting a design framework for applications based on our hardware simulator.Peer ReviewedPostprint (author's final draft

Modeling of Coupled Memristive-Based Architectures Applicable to Neural Network Models

This chapter explores the dynamic behavior of dual flux coupled memristor circuits in order to explore the uncharted territory of the fundamental theory of memristor circuits. Neuromorphic computing anticipates highly dense systems of memristive networks, and with nanoscale devices within such close proximity to one another, it is anticipated that flux and charge coupling between adjacent memristors will have a bearing upon their operation. Using the constitutive relations of memristors, various cases of flux coupling are mathematically modeled. This involves analyzing two memristors connected in composite, both serially and in parallel in various polarity configurations. The new behavior of two coupled memristors is characterized based on memristive state equations, and memductance variation represented in terms of voltage, current, charge and flux. The rigorous mathematical analysis based on the fundamental circuit equations of ideal memristors affirms the memristor closure theorem, where coupled memristor circuits behave as different types of memristors with higher complexity

A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators

A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations

Crossbar-based memristive logic-in-memory architecture

The use of memristors and resistive random access memory (ReRAM) technology to perform logic computations, has drawn considerable attention from researchers in recent years. However, the topological aspects of the underlying ReRAM architecture and its organization have received less attention, as the focus has mainly been on device-specific properties for functionally complete logic gates through conditional switching in ReRAM circuits. A careful investigation and optimization of the target geometry is thus highly desirable for the implementation of logic-in-memory architectures. In this paper, we propose a crossbar-based in-memory parallel processing system in which, through the heterogeneity of the resistive cross-point devices, we achieve local information processing in a state-of-the-art ReRAM crossbar architecture with vertical group-accessed transistors as cross-point selector devices. We primarily focus on the array organization, information storage, and processing flow, while proposing a novel geometry for the cross-point selection lines to mitigate current sneak-paths during an arbitrary number of possible parallel logic computations. We prove the proper functioning and potential capabilities of the proposed architecture through SPICE-level circuit simulations of half-adder and sum-of-products logic functions. We compare certain features of the proposed logic-in-memory approach with another work of the literature, and present an analysis of circuit resources, integration density, and logic computation parallelism.Peer ReviewedPostprint (author's final draft

An Investigation into Neuromorphic ICs using Memristor-CMOS Hybrid Circuits

The memristance of a memristor depends on the amount of charge flowing through it and when current stops flowing through it, it remembers the state. Thus, memristors are extremely suited for implementation of memory units. Memristors find great application in neuromorphic circuits as it is possible to couple memory and processing, compared to traditional Von-Neumann digital architectures where memory and processing are separate. Neural networks have a layered structure where information passes from one layer to another and each of these layers have the possibility of a high degree of parallelism. CMOS-Memristor based neural network accelerators provide a method of speeding up neural networks by making use of this parallelism and analog computation. In this project we have conducted an initial investigation into the current state of the art implementation of memristor based programming circuits. Various memristor programming circuits and basic neuromorphic circuits have been simulated. The next phase of our project revolved around designing basic building blocks which can be used to design neural networks. A memristor bridge based synaptic weighting block, a operational transconductor based summing block were initially designed. We then designed activation function blocks which are used to introduce controlled non-linearity. Blocks for a basic rectified linear unit and a novel implementation for tan-hyperbolic function have been proposed. An artificial neural network has been designed using these blocks to validate and test their performance. We have also used these fundamental blocks to design basic layers of Convolutional Neural Networks. Convolutional Neural Networks are heavily used in image processing applications. The core convolutional block has been designed and it has been used as an image processing kernel to test its performance.Comment: Bachelor's thesi

Memristors for the Curious Outsiders

We present both an overview and a perspective of recent experimental advances and proposed new approaches to performing computation using memristors. A memristor is a 2-terminal passive component with a dynamic resistance depending on an internal parameter. We provide an brief historical introduction, as well as an overview over the physical mechanism that lead to memristive behavior. This review is meant to guide nonpractitioners in the field of memristive circuits and their connection to machine learning and neural computation.Comment: Perpective paper for MDPI Technologies; 43 page

Mesoscopic Models of Stochastic Transport

Transportphänomene treten in biologischen und künstlichen Systemen auf allen Längenskalen auf. In dieser Arbeit untersuchen wir sie für verschiedene Systeme aus einer mesoskopischen Perspektive, in der Fluktuationen physikalischer Größen um ihre Mittelwerte eine wichtige Rolle spielen. Im ersten Teil untersuchen wir die persistente Bewegung aktiver Brownscher Teilchen mit zusätzlichem Drehmoment, wie sie z.B. für Spermien oder Janus Teilchen auftritt. Wird ihre Bewegung auf einen Tunnel variierender Breite beschränkt, so setzt im thermischen Nichtgleichgewicht Transport ein; ungerichtete Fluktuationen des rauschhaften Antriebs werden gleichgerichtet. Hierdurch wird ein neuer Ratschentyp realisiert. Im zweiten Teil untersuchen wir den intrazellulären Cargotransport in den Axonen von Nervenzellen mithilfe molekularer Motoren. Sie werden als asymmetrischer Ausschlussprozess simuliert. Zusätzlich können die Cargos zwischen benachbarten Motoren ausgetauscht werden. Dadurch lassen sich charakteristische Eigenschaften des langsamen axonalen Transports mit einer einzigen Motorspezies reproduzieren. Bewerkstelligt wird dies durch die transiente Anbindung der Cargos an rückwärtslaufende Motorstaus. Im dritten Teil diskutieren wir resistive switching, die nicht volatile Widerstandsänderung eines Dielektrikums durch elektrische Impulse. Es wird für Anwendungen im Computerspeicher ausgenutzt, dem resistive RAM. Wir schlagen ein auf Sauerstoffvakanzen basierendes stochastisches Gitterhüpfmodell vor. Wir definieren binäre logische Zustände mit Hilfe der zugrunde liegenden Vakanzenverteilung und definieren Schreibe- und Leseoperationen durch Spannungsimpulse für ein solches Speicherelement. Überlegungen über die Unterscheidbarkeit dieser Operationen unter Fluktuationen zusammen mit der Deutlichkeit der unterschiedlichen Widerstandszustände selbst ermöglichen es uns, eine optimale Vakanzenzahl vorherzusagen.Transport phenomena occur in biological and artificial systems at all length scales. In this thesis, we investigate them for various systems from a mesoscopic perspective, in which fluctuations around their average properties play an important role. In the first part, we investigate the persistent diffusive motion of active Brownian particles with an additional torque. It can appear in many real life systems, for example in sperm cells or Janus particles. If their motion is confined to a tunnel of varying width, transport arises out of thermal equilibrium; unbiased fluctuations of the noisy drive are rectified. This way, we have realized a novel kind of ratchet. In the second part, we study intracellular cargo transport in the axons of nerve cells by molecular motors. They are modeled by an asymmetric exclusion process. In a new approach, we add a cargo exchange interaction between the motors. This way, the characteristics of slow axonal transport can be accounted for with a single motor species. It is explained by the transient attachment of cargos to reverse walking motors jams. In the third part, we discuss resistive switching, the non-volatile change of resistance in a dielectric due to electric pulses. It is exploited for applications in computer memory, the resistive random access memory (ReRAM). We propose a stochastic lattice hopping model based on the on oxygen vacancies. We define binary logical states by means of the underlying vacancy distributions, and establish a framework of writing and reading such a memory element with voltage pulses. Considerations about the discriminability of these operations under fluctuations together with the markedness of the resistive switching effect itself enable us to predict an optimal vacancy number