Design of RF Receiver Front end Subsystems with Low Noise Amplifier and Active Mixer for Intelligent Transportation Systems Application

This paper presents the design, simulation, and characterization of a novel low-noise amplifier (LNA) and active mixer for intelligent transportation system applications. A low noise amplifier is the key component of RF receiver systems. Design, simulation, and characterization of LNA have been performed to obtain the optimum value of noise figure, gain and reflection coefficient. Proposed LNA achieves measured voltage gains of ~18 dB, reflection coefficients of -20 dB, and noise figures of ~2 dB at 5.9 GHz, respectively. The active mixer is a better choice for a modern receiver system over a passive mixer. Key sight advanced design system in conjunction with the electromagnetic simulation tool, has been to obtain the optimal conversion gain and noise figure of the active mixer. The lower and upper resonant frequencies of mixer have been obtained at 2.45 GHz and 5.25 GHz, respectively. The measured conversion gains at lower and upper frequencies are 12 dB and 10.2 dB, respectively. The measured noise figures at lower and upper frequencies are 5.8 dB and 6.5 dB, respectively. The measured mixer interception point at lower and upper frequencies are 3.9 dBm and 4.2 dBm

An Energy-Efficient Reconfigurable Mobile Memory Interface for Computing Systems

The critical need for higher power efficiency and bandwidth transceiver design has significantly increased as mobile devices, such as smart phones, laptops, tablets, and ultra-portable personal digital assistants continue to be constructed using heterogeneous intellectual properties such as central processing units (CPUs), graphics processing units (GPUs), digital signal processors, dynamic random-access memories (DRAMs), sensors, and graphics/image processing units and to have enhanced graphic computing and video processing capabilities. However, the current mobile interface technologies which support CPU to memory communication (e.g. baseband-only signaling) have critical limitations, particularly super-linear energy consumption, limited bandwidth, and non-reconfigurable data access. As a consequence, there is a critical need to improve both energy efficiency and bandwidth for future mobile devices.;The primary goal of this study is to design an energy-efficient reconfigurable mobile memory interface for mobile computing systems in order to dramatically enhance the circuit and system bandwidth and power efficiency. The proposed energy efficient mobile memory interface which utilizes an advanced base-band (BB) signaling and a RF-band signaling is capable of simultaneous bi-directional communication and reconfigurable data access. It also increases power efficiency and bandwidth between mobile CPUs and memory subsystems on a single-ended shared transmission line. Moreover, due to multiple data communication on a single-ended shared transmission line, the number of transmission lines between mobile CPU and memories is considerably reduced, resulting in significant technological innovations, (e.g. more compact devices and low cost packaging to mobile communication interface) and establishing the principles and feasibility of technologies for future mobile system applications. The operation and performance of the proposed transceiver are analyzed and its circuit implementation is discussed in details. A chip prototype of the transceiver was implemented in a 65nm CMOS process technology. In the measurement, the transceiver exhibits higher aggregate data throughput and better energy efficiency compared to prior works

Tunable, Concurrent Multiband, Single Chain Radio Architecture for Low Energy 5G-RANs

This invited paper considers a key next step in the design of radio architectures aimed at supporting low energy consumption in 5G heterogeneous radio access networks. State-of-the-art mobile radios usually require one RF transceiver per standard, each working separately at any given time. Software defined radios, while spanning a wide range of standards and frequency bands, also work separately at any specific time. In 5G radio access networks, where continuous, multiband connectivity is envisaged, this conventional radio architecture results in high network power consumption. In this paper, we propose the novel concept of a concurrent multiband frequency-agile radio (CM-FARAD) architecture, which simultaneously supports multiple standards and frequency bands using a single, tunable transceiver. We discuss the subsystem radio design approaches for enabling the CM-FARAD architecture, including antennas, power amplifiers, low noise amplifiers and analogue to digital converters. A working prototype of a dual-band CM-FARAD test-bed is also presented together with measured salient performance characteristics

RF system model for In-band full duplex communications

Abstract. In recent years by increasing the demands for communication services various technologies are examined in order to improve the throughput and spectrum efficiency of the wireless communication systems. For improving the performance a communication network, system deficiencies such as transmitter and receiver impairments need to be removed or compensated. One way to improve the network efficiency is to employ full duplex technology. Full duplex technology doubles the network capacity compared to the case when typical frequency division duplexing (FDD) or time division duplexing (TDD) are employed in a transceiver design. Although full duplex (FD) technology has enhanced the performance of the radio communication devices, the main challenge in full duplex communication is the leaking self-interference signal from the transmitter to the receiver. Different methods are employed to suppress the self-interference signal in digital and analog domains which are categorized as passive or active cancellations. These techniques are discussed in this thesis in order to understand from which point in the propagation path, the required signal for cancellation can be taken and how those techniques are employed in digital and analog domains. For having a good self-interference cancellation (SIC) both analog and digital cancellation techniques are needed since typical digital suppression method is low complex and somewhat limited. In this thesis, first we start with discussing about the full duplex technology and the reason why it has become popular in recent years and later full duplex deficiencies are examined. In the following chapters different cancellation methods are introduced and some results are provided in Chapter 5