Modeling of quad-station module cluster tools using petri nets

The semiconductor industry is highly competitive, and with the recent chip shortage, the throughput of wafers has become more important than ever. One of the tools that the industry has deployed is to use of quad-station modules instead of the traditional single-station modules that allow for higher throughput and better wafer consistency by processing multiple wafers at the same time and distributing work. The industry trend is to use multiple transfer chamber robots to stack the quad-station modules in a series, particularly for etch products. In this work, the quad-station cluster tool wafer movement is modeled by using Petri net as a process-bounded system. The system analysis and simulations are performed by using timed and colored Petri nets. The results are useful to deepen our understanding of the discrete-event dynamics of quad-station module cluster tools and offer the highly needed insight into their efficient and deadlock-free operation

Control of Time-Constrained Dual-Armed Cluster Tools Using (max, +) Algebra

International audienceThe problem studied in this paper is the control of discrete event systems subject to strict temporal constraints using (max, +) algebra. Initially we sought necessary and sufficient conditions for the existence of a causal control law guaranteeing the respect of the temporal constraints. Subsequently, a method for calculating the control law, if any, is proposed. The application which we are interested in is the control of a manufacturing semiconductor wafers process subject to strict temporal constraints

IMPROVED PHOTOLITHOGRAPHY SCHEDULING IN SEMICONDUCTOR MANUFACTURING

Photolithography is typically the bottleneck process in semiconductor manufacturing. In this thesis, we present a model for optimizing photolithography job scheduling in the presence of both individual and cluster tools. The combination of individual and cluster tools that process various layers or stages of the semiconductor manufacturing process flow is a special type of flexible flowshop. We seek separately to minimize total weighted completion time and maximize on-time delivery performance. Experimental results suggest that our mathematical- and heuristic-based solution approaches show promise for real world implementation as they can help to improve resource utilization, reduce job completion times, and decrease unnecessary delays in a wafer fab

Novel Bonding technologies for wafer-level transparent packaging of MOEMS

Depending on the type of Micro-Electro-Mechanical System (MEMS), packaging costs are contributing up to 80% of the total device cost. Each MEMS device category, its function and operational environment will individually dictate the packaging requirement. Due to the lack of standardized testing procedures, the reliability of those MEMS packages sometimes can only be proven by taking into consideration its functionality over lifetime. Innovation with regards to cost reduction and standardization in the field of packaging is therefore of utmost importance to the speed of commercialisation of MEMS devices. Nowadays heavily driven by consumer applications the MEMS device market is forecasted to enjoy a compound annual growth rate (CAGR) above 13%, which is when compared to the IC device market, an outstanding growth rate. Nevertheless this forecasted value can drift upwards or downwards depending on the rate of innovation in the field of packaging. MEMS devices typically require a specific fabrication process where the device wafer is bonded to a second wafer which effectively encapsulates the MEMS structure. This method leaves the device free to move within a vacuum or an inert gas atmosphere.Comment: Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/EDA-Publishing

A Petri-Net-Based Scheduling Strategy for Dual-Arm Cluster Tools With Wafer Revisiting

International audienceThere are wafer fabrication processes in cluster tools that require wafer revisiting. The adoption of a swap strategy for such tools forms a 3-wafer cyclic (3-WC) period with three wafers completed in each period. It has been shown that, by such a scheduling strategy, the minimal cycle time cannot be reached for some cases. This raises a question of whether there is a scheduling method such that the performance can be improved. To answer this question, a dual-arm cluster tool with wafer revisiting is modeled by a Petri net. Based on the model, the dynamical behavior of the process is analyzed. Then, a 2-wafer cyclic (2-WC) scheduling strategy is revealed for the first time. Cycle time analysis is conducted for the proposed strategy to evaluate its performance. It shows that, for some cases, the performance obtained by a 2-WC schedule is better than that obtained by any existing 3-WC ones. Thus, they can be used to complement each other in scheduling dual-arm cluster tools with wafer revisiting. Illustrative examples are given

Timed Petri Net Models of Cluster Tools

Hierarchical analysis of manufacturing systems is performed in a top-down manner in which a general, approximate model is used to capture the main effects of component interconnections, while more detailed models of components provide the detailed information needed for the derivation of performance characteristics of the entire system. For Petri net models, this approach corresponds to stepwise refinements of models. Structural analysis, based on place invariants combined with simple net transformations, is used to obtain performance characteristics of the modeled systems

Sequencing Wafer Handler Moves to Improve the Performance of Sequential Cluster Tools

Cluster tools are highly integrated machines that can perform a sequence of semiconductor manufacturing processes. The sequence of wafer handler moves affects the total time needed to process a set of wafers. Reducing this time can reduce cycle time, reduce tool utilization, and increase tool capacity. This paper introduces the cluster tool scheduling problem for sequential cluster tools and describes a branch-and-bound algorithm that can find an optimal sequence of wafer handler moves. In addition, we enumerate the set of 1-unit cyclic sequences for two- and three-stage sequential cluster tools. Experimental results show that the tool performance can be improved significantly if the wafer handler follows a cyclic sequence instead of using a dispatching rule