Developmental program for 8-watt, 2.3- gigahertz, n-p-n, silicon transistor Final report, 12 Oct. 1966 - 30 Oct. 1968

Silicon microwave transistor with hermetic coaxial packag

A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology

An Electrostatic Discharge (ESD) protected Low- Noise Amplifier (LNA) for the 2.4 GHz ISM band designed in a 0.13 mum standard RFCMOS technology is presented. The amplifier, including packaging effects, achieves 16.8 dB power gain, reflexion coefficients S 11 , S 22 < -30 dB over the 2.4 GHz ISM band, a peak noise figure of 1.8 dB, and an IIP 3 of 1 dBm, while drawing less than 4.5 mA dc biasing current from the 1.2 V power supply. Further, the LNA withstands a Human Body Model (HBM) ESD stress up to plusmn2.0 kV, by means of the additional custom protection circuitry.Comisión Interministerial de Ciencia y Tecnología TIC2003-02355Ministerio de Educación y Ciencia TEC2006-0302

Design of a Compact GaN Power Amplifier with High Efficiency and Beyond Decade Bandwidth

This letter presents a power amplifier (PA) design and network synthesis approach to achieve wideband and efficient performance with a very compact circuit size. A design method is presented in detail to convert a canonical filter-based high-order matching network to the proposed matching configuration with transistor parasitic and packaged elements absorption, and a compact passive network footprint. As a proof of concept, a prototype GaN HEMT PA is implemented. Starting from a fourth-order output network filter, the inductances and capacitance of the filter elements are re-organized to model, and thus absorb the output parasitics of the transistor, leading to a compact footprint with only four transmission lines. The measured results show that the prototype PA achieves an output power of 41.9-44.3 dBm and a 55-74 % drain efficiency, over a record-high decade bandwidth (0.35-3.55 GHz)

Efficient and Wideband Load Modulated Power Amplifiers for Wireless Communication

The increasing demand for mobile data traffic has resulted in new challenges and requirements for the development of the wireless communication infrastructure. With the transition to higher frequencies and multi-antenna systems, radio frequency (RF) hardware performance, especially the power amplifier (PA), becomes increasingly important. Enhancing PA energy efficiency and bandwidth is vital for maximizing channel capacity, reducing operational costs, and facilitating integration.In the first part of the thesis, the bandwidth limitations of the standard two-way Doherty PA are discussed. A comprehensive analysis is provided, and the frequency responses of different Doherty combiner networks are presented. Furthermore, a Doherty combiner network is proposed, notable for its inherent broadband frequency and its capacity to account for the influence of output parasitics and packaged components from the active devices. The introduced Doherty combiner network is experimentally verified by a wideband gallium nitride (GaN) Doherty PA operating over 1.6-2.7 GHz.In the second part of the thesis, an analytically based combiner synthesis approach for the three-stage Doherty PA is proposed and presented. A compact output combiner network, together with the input phase delays, is derived directly from transistor load-pull data and the PA design requirements. The technique opens up new design space for three-stage Doherty PAs with reconfigurable high-efficiency power back-off levels. The utility of the proposed technique is demonstrated by the implementation of a 30-W GaN three-stage Doherty PA prototype at 2.14 GHz. Measurements show that a drain efficiency of 68% and 55% is exhibited at 6- and 10-dB back-off power, respectively.In the third part, a new PA architecture named the circulator load modulated amplifier (CLMA), is proposed. This architecture utilizes active load modulation for achieving enhanced back-off efficiency. Two active devices are incorporated in this innovative architecture, and a non-reciprocal circulator-based combiner is leveraged. Following this, the sequential CLMA (SCLMA) is introduced, characterized by its ability to enhance back-off efficiency without the necessity of load modulation. GaN demonstrator circuits for both CLMA and SCLMA architectures, whether with dual-input or RF single-input, are designed and fabricated, with excellent performance being measured.\ua0The thesis contributes novel design techniques and architectures to enhance PA efficiency and bandwidth. These findings pave the way for energy-efficient and adaptable RF transmitters in future wireless communication systems

5 Watt GaN HEMT Power Amplifier for LTE

This work presents the design and implementation of a stand-alone linear power amplifier at 2.4 GHz with high output power. A GaN HEMT transistor is selected for the design and implementation of the power amplifier. The device exhibits a gain of 11.7 dB and a drain efficiency of 39% for an output power of 36.7 dBm at 2.4 GHz for an input power of 25dBm. The carrier to intermodulation ratio is better than 25 dB for a two tone input signal of 25 dBm of total power and a spacing of 5 MHz. The fabricated device is also tested with LTE input signals of different bandwidths (5MHz to 20MHz)

Advanced High Efficiency and Broadband Power Amplifiers Based on GaN HEMT for Wireless Applications

In advanced wireless communication systems, a rapid increase in the mobile data traffic and broad information bandwidth requirement can lead to the use of complex spectrally efficient modulation schemes such as orthogonal frequency-division multiplexing (OFDM). Generally, complex non-constant envelope modulated signals have very high peak-to-average ratios (PAPR). Doherty Power Amplifier (DPA) is the most commonly used power amplifier (PA) architecture for meeting high efficiency requirement in advanced communication systems, in the presence of high PAPR signals. However, limited bandwidth of the conventional DPA is often identified as a bottleneck for widespread deployment in base-station application for multi-standard communication signals. The research in this thesis focuses on the development of new designs to overcome the bandwidth limitations of a conventional PA. In particular, the bandwidth limitation factors of a conventional DPA architecture are studied. Moreover, a novel design technique is proposed for DPA’s bandwidth extension. In the first PA design, limited bandwidth and linearity problems are addressed simultaneously. For this purpose, a new Class-AB PA with extended bandwidth and improved linearity is presented for LTE 5 W pico-cell base-station over a frequency range of 1.9–2.5 GHz. A two-tone load/source-pull and bias point optimization techniques are used to extract the sweet spots for optimum efficiency and linearity from the 6 W Cree GaN HEMT device for the whole frequency band. The realized prototype presented saturated PAE higher than 60%, a power gain of 13 dB and an average output power of 36.5 dBm over the desired bandwidth. The proposed PA is also characterized by QAM-256 and LTE input communication signals for linearity characterization. Measured ACPRs are lower than -40 dBc for an input power of 17 dBm. The documented results indicate that the proposed Class-AB architecture is suitable for pico-cell base-station application. In the second PA design, an inherent bandwidth limitation of Class-F power amplifier forced by the improper load harmonics terminations at multiple harmonics is investigated and analyzed. It is demonstrated that the impedance tuning of the second and third harmonics at the drain terminal of a transistor is crucial to achieve a broadband performance. The effect of harmonics terminations on power amplifier’s bandwidth up to fourth harmonics is investigated. The implemented broadband Class-F PA achieved maximum saturated drain efficiency 60-77%, and 10 W output power throughout (1.1-2.1 GHz) band. The simulated and measured results verify that the presented Class-F PA is suitable for a high-efficiency system application in wireless communications over a wide range of frequencies. In the third PA design, a single- and dual-input DPA for LTE application in the 3.5 GHz frequency band are presented and compared. The main goal of this study is to improve the performance of gallium–nitride (GaN) Doherty transmitters over a wide bandwidth in the 3.5 GHz frequency band. For this purpose, the linearity-efficiency trade-off for the two proposed architectures is discussed in detail. Simulated results demonstrate that the single- and dual-input DPA exhibited a peak drain efficiency (DE) of 72.4% and 77%, respectively. Both the circuits showed saturated output power more than 42.9 dBm throughout the designed band. Saturated efficiency, gain and bandwidth of dual-input DPA are higher than that of the single-input DPA. On the other side, dual-input DPA linearity is worse as compared to the single-input DPA. In the last PA design, a novel design methodology for ultra-wide band DPA is presented. The bandwidth limitation factors of the conventional Doherty amplifier are discussed on the ground of broadband matching with impedance variation. To extend the DPA bandwidth, three different methods are used such as post-matching, low impedance transformation ratio and the optimization of offset line for wide bandwidth in the proposed design. The proposed Doherty power amplifier was designed and realized based on two 10 W GaN HEMT devices from Cree Inc. The measured results exhibited 42-57% of efficiency at the 6-dB back-off and saturated output power ranges from 41.5 to 43.1 dBm in the frequency range of 1.15 to 2.35 GHz (68.5% fractional bandwidth). Moreover, less than -25 dBc ACPRs are measured at 42 dBm peak output power throughout the designed band. In a nutshell, all power amplifiers presented in this thesis are suitable for wideband operation and their performances are satisfying the required operational standard. Therefore, this thesis has a significant contribution in the domain of high efficiency and broadband power amplifiers

High-Power Microwave/ Radio-Frequency Components, Circuits, and Subsystems for Next-Generation Wireless Radio Front-Ends

As the wireless communication systems evolve toward the future generation, intelligence will be the main signature/trend, well known as the concepts of cognitive and software-defined radios which offer ultimate data transmission speed, spectrum access, and user capacity. During this evolution, the human society may experience another round of `information revolution\u27. However, one of the major bottlenecks of this promotion lies in hardware realization, since all the aforementioned intelligent systems are required to cover a broad frequency range to support multiple communication bands and dissimilar standards. As the essential part of the hardware, power amplifiers (PAs) capable of operating over a wide bandwidth have been identified as the key enabling technology. This dissertation focuses on novel methodologies for designing and realizing broadband high-power PAs, their integration with high-quality-factor (high-Q) tunable filters, and relevant investigations on the reliabilities of these tunable devices. It can be basically divided into three major parts: 1.Broadband High-Efficiency Power Amplifiers. Obtaining high PA efficiency over a wide bandwidth is very challenging, because of the difficulty of performing broadband multi-harmonic matching. However, high efficiency is the critical feature for high-performance PAs due to the ever-increasing demands for environmental friendliness, energy saving, and longer battery life. In this research, novel design methodologies of broad-band highly efficient PAs are proposed, including the first-ever mode-transferring PA theory, novel matching network topology, and wideband reconfigurable PA architecture. These techniques significantly advance the state-of-the-art in terms of bandwidth and efficiency. 2.Co-Design of PAs and High-Q Tunable Filters. When implementing the intelligent communication systems, the conventional approach based on independent RF design philosophy suffers from many inherent defects, since no global optimization is achieved leading to degraded overall performance. An attractive method to solve these difficulties is to co-design critical modules of the transceiver chain. This dissertation presents the first-ever co-design of PAs and tunable filters, in which the redundant inter-module matching is entirely eliminated, leading to minimized size & cost and maximized overall performance. The saved hardware resources can be further transferred to enhance system functionalities. Moreover, we also demonstrate that co-design of PAs and filters can lead to more functionalities/benefits for the wireless systems, e.g. efficient and linear amplification of dual-carrier (or multi-carrier) signals. 3.High-Power/Non-Linear Study on Tunable Devices. High-power limitation/power handling is an everlasting theme of tunable devices, as it determines the operational life and is the threshold for actual industrial applications. Under high-power operation, the high RF voltage can lead to failures like tuners\u27 mechanical deflections and gas discharge in the small air spacing of the cavity. These two mechanisms are studied independently with their instantaneous and long-term effects on the device performance. In addition, an anti-biased topology of electrostatic RF MEMS varactors and tunable filters is proposed and experimentally validated for reducing the non-linear effect induced by bias-noise. These investigations will enlighten the designers on how to avoid and/or minimize the non-ideal effects, eventually leading to longer life cycle and performance sustainability of the tunable devices

Design of Highly Efficient Broadband Class-E Power Amplifier Using Synthesized Low-Pass Matching Networks

A new methodology for designing and implementing high-efficiency broadband Class-E power amplifiers (PAs) using high-order low-pass filter-prototype is proposed in this paper. A GaN transistor is used in this work, which is carefully modeled and characterized to prescribe the optimal output impedance for the broadband Class-E operation. A sixth-order low-pass filter-matching network is designed and implemented for the output matching, which provides optimized fundamental and harmonic impedances within an octave bandwidth (L-band). Simulation and experimental results show that an optimal Class-E PA is realized from 1.2 to 2 GHz (50%) with a measured efficiency of 80%-89%, which is the highest reported today for such a bandwidth. An overall PA bandwidth of 0.9-2.2 GHz (84%) is measured with 10-20-W output power, 10-13-dB gain, and 63%-89% efficiency throughout the band. Furthermore, the Class-E PA is characterized through measurements using constant-envelop global system for mobile communications signals, indicating a favorable adjacent channel power ratio from -40 to -50 dBc within the entire bandwidth

Novel techniques for improving the performance of MESFET power amplifiers.

This thesis describes the research activities that have been investigated for improving the 3rd order intermodulation distortion products (IM3) and power added efficiency (PAE) and bandwidth performance of microwave GaAs MESFET power amplifiers. Two novel circuit techniques, one for improving the 3dB bandwidth performance and the other for improving the IM3 and PAE performance, were proposed and verified through simulation and practical measurements. The technique of including lumped elements matching networks within the package encapsulation (Close-to-Chip lumped element matching) of a 2GHz MESFET device is described for the first time. Simulation results showed that the amplifier using this technique had a 3dB bandwidth 3 times wider than the amplifier with Off-Chip distributed element matching. The linearity and efficiency performance of a 2GHz MESFET was improved significantly by presenting a difference frequency shunt short-circuit termination across the drain terminal. A 16dB reduction in IM3 and an improvement of 4% in PAE performance was measured on the bench. Success with this technique was further demonstrated with digitally modulated signals