Joint Design of Multi-Tap Analog Cancellation and Digital Beamforming for Reduced Complexity Full Duplex MIMO Systems

Incorporating full duplex operation in Multiple Input Multiple Output (MIMO) systems provides the potential of boosting throughput performance. However, the hardware complexity of the analog self-interference canceller scales with the number of transmit and receive antennas, thus exploiting the benefits of analog cancellation becomes impractical for full duplex MIMO transceivers. In this paper, we present a novel architecture for the analog canceller comprising of reduced number of taps (tap refers to a line of fixed delay and variable phase shifter and attenuator) and simple multiplexers for efficient signal routing among the transmit and receive radio frequency chains. In contrast to the available analog cancellation architectures, the values for each tap and the configuration of the multiplexers are jointly designed with the digital beamforming filters according to certain performance objectives. Focusing on a narrowband flat fading channel model as an example, we present a general optimization framework for the joint design of analog cancellation and digital beamforming. We also detail a particular optimization objective together with its derived solution for the latter architectural components. Representative computer simulation results demonstrate the superiority of the proposed low complexity full duplex MIMO system over lately available ones.Comment: 8 pages, 4 figures, IEEE ICC 201

Digital and Mixed Domain Hardware Reduction Algorithms and Implementations for Massive MIMO

Emerging 5G and 6G based wireless communications systems largely rely on multiple-input-multiple-output (MIMO) systems to reduce inherently extensive path losses, facilitate high data rates, and high spatial diversity. Massive MIMO systems used in mmWave and sub-THz applications consists of hundreds perhaps thousands of antenna elements at base stations. Digital beamforming techniques provide the highest flexibility and better degrees of freedom for phased antenna arrays as compared to its analog and hybrid alternatives but has the highest hardware complexity. Conventional digital beamformers at the receiver require a dedicated analog to digital converter (ADC) for every antenna element, leading to ADCs for elements. The number of ADCs is the key deterministic factor for the power consumption of an antenna array system. The digital hardware consists of fast Fourier transform (FFT) cores with a multiplier complexity of (N log2N) for an element system to generate multiple beams. It is required to reduce the mixed and digital hardware complexities in MIMO systems to reduce the cost and the power consumption, while maintaining high performance. The well-known concept has been in use for ADCs to achieve reduced complexities. An extension of the architecture to multi-dimensional domain is explored in this dissertation to implement a single port ADC to replace ADCs in an element system, using the correlation of received signals in the spatial domain. This concept has applications in conventional uniform linear arrays (ULAs) as well as in focal plane array (FPA) receivers. Our analysis has shown that sparsity in the spatio-temporal frequency domain can be exploited to reduce the number of ADCs from N to where . By using the limited field of view of practical antennas, multiple sub-arrays are combined without interferences to achieve a factor of K increment in the information carrying capacity of the ADC systems. Applications of this concept include ULAs and rectangular array systems. Experimental verifications were done for a element, 1.8 - 2.1 GHz wideband array system to sample using ADCs. This dissertation proposes that frequency division multiplexing (FDM) receiver outputs at an intermediate frequency (IF) can pack multiple (M) narrowband channels with a guard band to avoid interferences. The combined output is then sampled using a single wideband ADC and baseband channels are retrieved in the digital domain. Measurement results were obtained by employing a element, 28 GHz antenna array system to combine channels together to achieve a 75% reduction of ADC requirement. Implementation of FFT cores in the digital domain is not always exact because of the finite precision. Therefore, this dissertation explores the possibility of approximating the discrete Fourier transform (DFT) matrix to achieve reduced hardware complexities at an allowable cost of accuracy. A point approximate DFT (ADFT) core was implemented on digital hardware using radix-32 to achieve savings in cost, size, weight and power (C-SWaP) and synthesized for ASIC at 45-nm technology

Ultra-Wideband Secure Communications and Direct RF Sampling Transceivers

Larger wireless device bandwidth results in new capabilities in terms of higher data rates and security. The 5G evolution is focus on exploiting larger bandwidths for higher though-puts. Interference and co-existence issues can also be addressed by the larger bandwidth in the 5G and 6G evolution. This dissertation introduces of a novel Ultra-wideband (UWB) Code Division Multiple Access (CDMA) technique to exploit the largest bandwidth available in the upcoming wireless connectivity scenarios. The dissertation addresses interference immunity, secure communication at the physical layer and longer distance communication due to increased receiver sensitivity. The dissertation presents the design, workflow, simulations, hardware prototypes and experimental measurements to demonstrate the benefits of wideband Code-Division-Multiple-Access. Specifically, a description of each of the hardware and software stages is presented along with simulations of different scenarios using a test-bench and open-field measurements. The measurements provided experimental validation carried out to demonstrate the interference mitigation capabilities. In addition, Direct RF sampling techniques are employed to handle the larger bandwidth and avoid analog components. Additionally, a transmit and receive chain is designed and implemented at 28 GHz to provide a proof-of-concept for future 5G applications. The proposed wideband transceiver is also used to demonstrate higher accuracy direction finding, as much as 10 times improvement

Frequency-Multiplexed Array Digitization for MIMO Receivers: 4-Antennas/ADC at 28 GHz on Xilinx ZCU-1285 RF SoC

Communications at mm-wave frequencies and above rely heavily on beamforming antenna arrays. Typically, hundreds, if not thousands, of independent antenna channels are used to achieve high SNR for throughput and increased capacity. Using a dedicated ADC per antenna receiver is preferable but it\u27s not practical for very large arrays due to unreasonable cost and complexity. Frequency division multiplexing (FDM) is a well-known technique for combining multiple signals into a single wideband channel. In a first of its kind measurements, this paper explores FDM for combining multiple antenna outputs at IF into a single wideband signal that can be sampled and digitized using a high-speed wideband ADC. The sampled signals are sub-band filtered and digitally down-converted to obtain individual antenna channels. A prototype receiver was realized with a uniform linear array consisting of 4 elements with 250 MHz bandwidth per channel at 28 GHz carrier frequency. Each of the receiver chains were frequency-multiplexed at an intermediate frequency of 1 GHz to avoid the requirement for multiple, precise local oscillators (LOs). Combined narrowband receiver outputs were sampled using a single ADC with digital front-end operating on a Xilinx ZCU-1285 RF SoC FPGA to synthesize 4 digital beams. The approach allows $M$ -fold increase in spatial degrees of freedom per ADC, for temporal oversampling by a factor of $M$

Millimeter wave MIMO communications : high-resolution angle acquisition and low-resolution time-frequency synchronization

Knowledge of the propagation channel is critical to exploit the full benefit of multiple-input multiple-output (MIMO) techniques in millimeter wave (mmWave) cellular systems. Obtaining accurate channel state information in mmWave systems, however, is challenging due to high estimation overhead, high computational complexity and on-grid setting. It is also desirable to reduce the analog-to-digital converters (ADCs) resolution at mmWave frequencies to reduce power consumption and implementation costs. The use of low-precision ADCs, though, brings new design challenges to practical cellular networks. In the first part of this dissertation, we develop several new methods to estimate and track the mmWave channel's angle-of-departure and angle-of-arrival with high accuracy and low overhead. The key ingredient of the proposed strategies is custom designed beam pairs, from which there exists an invertible function of the angle to be estimated. We further extend the proposed algorithms to dual-polarized MIMO in wideband channels, and angle tracking design for fast-varying environments. We derive analytical angle estimation error performance of the proposed methods in single-path channels. We also use numerical examples to characterize the robustness of the proposed approaches to various transceiver settings and channel conditions. In the second part of this dissertation, we focus on improving the low-resolution time-frequency synchronization performance for mmWave cellular systems. In our system model, the base station uses analog beams to send the synchronization signal with infinite-resolution digital-to-analog converters (DACs). The user equipment employs a fully digital front end to detect the synchronization signal with low-resolution ADCs. For low-resolution timing synchronization, we propose a new multi-beam probing based strategy, targeting at maximizing the minimum received synchronization signal-to-quantization-plus-noise ratio among all serving users. Regarding low-resolution frequency synchronization, we construct new sequences for carrier frequency offset (CFO) estimation and compensation. We use both analytical and numerical examples to show that the proposed sequences and the corresponding metrics used for retrieving the CFOs are robust to the quantization distortion.Electrical and Computer Engineerin

Arquiteturas paralelas avançadas para transmissores 5G totalmente digitais

The fifth generation of mobile communications (5G) is being prepared and should be rolled out in the early coming years. Massive number of Radio-Frequency (RF) front-ends, peak data rates of 10 Gbps (everywhere and everytime), latencies lower than 10 msec and huge device densities are some of the expected disruptive capabilities. At the same time, previous generations can not be jeopardized, fostering the design of novel flexible and highly integrated radio transceivers able to support the simultaneous transmission of multi-band and multi-standard signals. The concept of all-digital transmission is being pointed out as a promising architecture to cope with such challenging requirements, due to its fully digital radio datapath. This thesis is focused on the proposal and validation of fully integrated and advanced digital transmitter architectures that excel the state-of-the-art in different figures of merit, such as transmission bandwidth, spectral purity, carrier agility, flexibility, and multi-band capability. The first part of this thesis introduces the concept of all-digital RF transmission. In particular, the foundations inherent to this thematic line are given, together with the recent advances reported in the state-of-the-art architectures.The core of this thesis, containing the main developments achieved during the Ph.D. work, is then presented and discussed. The first key contribution to the state-of-the-art is the use of cascaded Delta-Sigma (∆Σ) architectures to relax the analog filtering requirements of the conventional All-Digital Transmitters while maintaining the constant envelope waveform. Then, it is presented the first reported architecture where Antenna Arrays are directly driven by single-chip and single-bit All-Digital Transmitters, with promising results in terms of simplification of the RF front-ends and overall flexibility. Subsequently, the thesis proposes the first reported RF-stage All-Digital Transmitter that can be embedded within a single Field-Programmable Gate Array (FPGA) device. Thereupon, novel techniques to enable the design of wideband All-Digital Transmitters are reported. Finally, the design of concurrent multi-band transmitters is introduced. In particular, the design of agile and flexible dual and triple bands All-DigitalTransmitter (ADT) is demonstrated, which is a very important topic for scenarios that demand carrier aggregation. This Ph.D. contributes withseveral advances to the state-of-the-art of RF all-digital transmitters.A quinta geração de comunicações móveis (5G) está a ser preparada e deve ser comercializada nos próximos anos. Algumas das caracterı́sticas inovadoras esperadas passam pelo uso de um número massivo de font-ends de Rádio-Frequência (RF), taxas de pico de transmissão de dados de 10 Gbps (em todos os lugares e em todas as ocasiões), latências inferiores a 10 mseg e elevadas densidades de dispositivos. Ao mesmo tempo, as gerações anteriores não podem ser ignoradas, fomentando o design de novos transceptores de rádio flexı́veis e altamente integrados, capazes de suportar a transmissão simultânea de sinais multi-banda e multi-standard. O conceito de transmissão totalmente digital é considerado como um tipo de arquitetura promissora para lidar com esses requisitos desafiantes, devido ao seu datapath de rádio totalmente digital. Esta tese é focada na proposta e validação de arquiteturas de transmissores digitais totalmente integradas e avançadas que ultrapassam o estado da arte em diferentes figuras de mérito, como largura de banda de transmissão, pureza espectral, agilidade de portadora, flexibilidade e capacidade multibanda. A primeira parte desta tese introduz o conceito de transmissores de RF totalmente digitais. Em particular, os fundamentos inerentes a esta linha temática são apresentados, juntamente com os avanços mais recentes do estado-da-arte. O núcleo desta tese, contendo os principais desenvolvimentos alcançados durante o trabalho de doutoramento, é então apresentado e discutido. A primeira contribuição fundamental para o estado da arte é o uso de arquiteturas em cascata com moduladores ∆Σ para relaxar os requisitos de filtragem analógica dos transmissores RF totalmente digitais convencionais, mantendo a forma de onda envolvente constante. Em seguida, é apresentada a primeira arquitetura em que agregados de antenas são excitados diretamente por transmissores digitais de um único bit inseridos num único chip, com resultados promissores em termos de simplificação dos front-ends de RF e flexibilidade em geral. Posteriormente, é proposto o primeiro transmissor totalmente digital RF-stage relatado que pode ser incorporado dentro de um único Agregado de Células Lógicas Programáveis. Novas técnicas para permitir o desenho de transmissores RF totalmente digitais de banda larga são também apresentadas. Finalmente, o desenho de transmissores simultâneos de múltiplas bandas é exposto. Em particular, é demonstrado o desenho de transmissores de duas e três bandas ágeis e flexı́veis, que é um tópico essencial para cenários que exigem agregação de múltiplas bandas.Apoio financeiro da Fundação para a Ciência e Tecnologia (FCT) no âmbito de uma bolsa de doutoramento, ref. PD/BD/105857/2014.Programa Doutoral em Telecomunicaçõe

Recent Advances in Wireless Communications and Networks

This book focuses on the current hottest issues from the lowest layers to the upper layers of wireless communication networks and provides "real-time" research progress on these issues. The authors have made every effort to systematically organize the information on these topics to make it easily accessible to readers of any level. This book also maintains the balance between current research results and their theoretical support. In this book, a variety of novel techniques in wireless communications and networks are investigated. The authors attempt to present these topics in detail. Insightful and reader-friendly descriptions are presented to nourish readers of any level, from practicing and knowledgeable communication engineers to beginning or professional researchers. All interested readers can easily find noteworthy materials in much greater detail than in previous publications and in the references cited in these chapters

SYMBOL LEVEL PRECODING TECHNIQUES FOR HARDWARE AND POWER EFFICIENT WIRELESS TRANSCEIVERS

Large-scale antennas are crucial for next generation wireless communication systems as they improve spectral efficiency, reliability and coverage compared to the traditional ones that are employing antenna arrays of few elements. However, the large number of antenna elements leads to a big increase in power consumption of conventional fully digital transceivers due to the one Radio Frequency (RF) chain / per antenna element requirement. The RF chains include a number of different components among which are the Digital-to-Analog Converters (DACs)/Analog-to-Digital Converters (ADCs) that their power consumption increases exponential with the resolution they support. Motivated by this, in this thesis, a number of different architectures are proposed with the view to reduce the power consumption and the hardware complexity of the transceiver. In order to optimize the transmission of data through them, corresponding symbol level precoding (SLP) techniques were developed for the proposed architectures. SLP is a technique that mitigates multi-user interference (MUI) by designing the transmitted signals using the Channel State Information and the information-bearing symbols. The cases of both frequency flat and frequency selective channels were considered. First, three different power efficient transmitter designs for transmission over frequency flat channels and their respective SLP schemes are considered. The considered systems tackle the high hardware complexity and power consumption of existing SLP techniques by reducing or completely eliminating fully digital RF chains. The precoding design is formulated as a constrained least squares problem and efficient algorithmic solutions are developed via the Coordinate Descent method. Next, the case of frequency selective channels is considered. To this end, Constant Envelope precoding in a Multiple Input Multiple Output Orthogonal Frequency Division Multiplexing system (CE MIMO-OFDM) is considered. In CE MIMO-OFDM the transmitted signals for each antenna are designed to have constant amplitude regardless of the channel realization and the information symbols that must be conveyed to the users. This facilitates the use of power-efficient components, such as phase shifters and non-linear power amplifiers. The precoding problem is firstly formulated as a least-squares problem with a unit-modulus constraint and solved using an algorithm based on the coordinate descent (CCD) optimization framework and then, after reformulating the problem into an unconstrained non-linear least squares problem, a more computationally efficient solution using the Gauss-Newton algorithm is presented. Then, CE MIMO-OFDM is considered for a system with low resolution DACs. The precoding design problem is formulated as a mixed discrete- continuous least-squares optimization one which is NP-hard. An efficient low complexity solution is developed based also on the CCD optimization framework. Finally, a precoding scheme is presented for OFDM transmission in MIMO systems based on one-bit DACs and ADCs at the transmitter’s and the receiver’s end, respectively, as a way to reduce the total power consumption. The objective of the precoding design is to mitigate the effects of one-bit quantization and the problem is formulated and then is split into two NP hard least squares optimization problems. Algorithmic solutions are developed for the solution of the latter problems, based on the CCD framework