Built-In Self-Test for Automatic Analog Frequency Response Measurement

Abstract-We present a Built-In Self-Test (BIST) approach based on direct digital synthesizer (DDS) for functional test of analog circuitry in mixed-signal systems. DDS with delta-sigma noise shaping is used to generate test signals with different frequencies and phases. The DDS-based BIST hardware implementation can sweep the frequencies through the interested bands and thus measure the frequency response of the analog circuit. The proposed BIST approach has been implemented in Verilog and synthesized into a Field Programmable Gate Array (FPGA). The actual device under test (DUT) was implemented using a Field Programmable Analog Array (FPAA) to form a complete BIST testbed for analog functional tests

Wideband Self-Adaptive RF Cancellation Circuit for Full-Duplex Radio: Operating Principle and Measurements

This paper presents a novel RF circuit architecture for self-interference cancellation in inband full-duplex radio transceivers. The developed canceller is able to provide wideband cancellation with waveform bandwidths in the order of 100 MHz or beyond and contains also self-adaptive or self-healing features enabling automatic tracking of time-varying self-interference channel characteristics. In addition to architecture and operating principle descriptions, we also provide actual RF measurements at 2.4 GHz ISM band demonstrating the achievable cancellation levels with different bandwidths and when operating in different antenna configurations and under low-cost highly nonlinear power amplifier. In a very challenging example with a 100 MHz waveform bandwidth, around 41 dB total cancellation is obtained while the corresponding cancellation figure is close to 60 dB with the more conventional 20 MHz carrier bandwidth. Also, efficient tracking in time-varying reflection scenarios is demonstrated.Comment: 7 pages, to be presented in 2015 IEEE 81st Vehicular Technology Conferenc

A design for testability study on a high performance automatic gain control circuit.

A comprehensive testability study on a commercial automatic gain control circuit is presented which aims to identify design for testability (DfT) modifications to both reduce production test cost and improve test quality. A fault simulation strategy based on layout extracted faults has been used to support the study. The paper proposes a number of DfT modifications at the layout, schematic and system levels together with testability. Guidelines that may well have generic applicability. Proposals for using the modifications to achieve partial self test are made and estimates of achieved fault coverage and quality levels presente

Testing high resolution SD ADC’s by using the noise transfer function

A new solution to improve the testability of high resolution SD Analogue to Digital Converters (SD ADC’s) using the quantizer input as test node is described. The theoretical basis for the technique is discussed and results from high level simulations for a 16 bit, 4th order, audio ADC are presented. The analysis demonstrates the potential to reduce the computational effort associated with test response analysis versus conventional techniques

Reconfiguration based built-in self-test for analogue front-end circuits

Previous work has shown that it is feasible to implement a fully digital test evaluation function to realise partial self-test on an automatic gain control circuit (AGC). This paper extends the technique to INL, DNL, offset & gain error testing of analogue to digital converters (ADC's). It also shows how the same function can be used to test an AGC / ADC pair. An extension to full self-test is also proposed by the on-chip generation of input stimuli through reconfiguration of existing functions

Bridges Structural Health Monitoring and Deterioration Detection Synthesis of Knowledge and Technology

INE/AUTC 10.0

Implementations guidelines, airborne evaluation equipment, advanced system checkout design, phase B Final report, 29 Jun. 1965 - 29 Jul. 1966

Airborne checkout equipment functions and implementation for Saturn IVB stage and instrument uni

Preliminary design of a 100 kW turbine generator

The National Science Foundation and the Lewis Research Center have engaged jointly in a Wind Energy Program which includes the design and erection of a 100 kW wind turbine generator. The machine consists primarily of a rotor turbine, transmission, shaft, alternator, and tower. The rotor, measuring 125 feet in diameter and consisting of two variable pitch blades operates at 40 rpm and generates 100 kW of electrical power at 18 mph wind velocity. The entire assembly is placed on top of a tower 100 feet above ground level