2,382 research outputs found

    Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics

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    To provide high speed, low dynamic power dissipation, and low cross-talk noise for microelectronic circuits, low-dielectric-constant (low-k) materials are required as the inter- and intra-level dielectric (ILD) insulator of the back-end-of-line interconnects. Porous low-k materials have low-polarizability chemical compositions and the introducing porosity in the film. Integration of porous low-k materials into microelectronic circuits, however, poses a number of challenges because the composition and porosity affected the resistance to damage during integration processing and reduced the mechanical strength, thereby degrading the properties and reliability. These issues arising from porous low-k materials are the subject of the present chapter

    Copper Metal for Semiconductor Interconnects

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    Resistance-capacitance (RC) delay produced by the interconnects limits the speed of the integrated circuits from 0.25 mm technology node. Copper (Cu) had been used to replace aluminum (Al) as an interconnecting conductor in order to reduce the resistance. In this chapter, the deposition method of Cu films and the interconnect fabrication with Cu metallization are introduced. The resulting integration and reliability challenges are addressed as well

    Development of plasma enhanced chemical vapor deposition (PECVD) gate dielectrics for TFT applications

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    This study investigated a variety of electrically insulating materials for potential use as a gate dielectric in thin-film transistor applications. The materials that were investigated include silicon dioxide and oxynitride films deposited using PECVD and LPCVD techniques. Silicon source materials included tetraethylorthosilicate (TEOS) and silane (SiH4). Oxygen sources included diatomic oxygen (O2) and nitrous oxide (N2O). The optical, electrical, and material properties of the dielectrics were analyzed using Variable Angle Spectroscopic Ellipsometry (VASE), Fourier Transform Infrared Spectroscopy (FTIR), Capacitance-Voltage (C-V) analysis and current-voltage (I-V) analysis. Transistors were also fabricated at low temperatures with different gate dielectrics to investigate the impact on device performance. While a deposited gate dielectric is intrinsically inferior to a thermally grown SiO2 layer, an objective of this study was to create a high quality gate dielectric with low levels of bulk and interface charge (Qit & Qot~1x1010 cm2); this was achieved

    Plasma Damage on Low-k Dielectric Materials

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    Low dielectric constant (low-k) materials as an interconnecting insulator in integrated circuits are essential for resistance-capacitance (RC) time delay reduction. Plasma technology is widely used for the fabrication of the interconnects, such as dielectric etching, resisting ashing or stripping, barrier metal deposition, and surface treatment. During these processes, low-k dielectric materials may be exposed to the plasma environments. The generated reactive species from the plasma react with the low-k dielectric materials. The reaction involves physical and chemical effects, causing degradations for low-k dielectric materials. This is called “plasma damage” on low-k dielectric materials. Therefore, this chapter is an attempt to provide an overview of plasma damage on the low-k dielectric materials
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