Design of millimeter-wave bandpass filters with broad bandwidth in Si-based technology

In this paper, a novel design approach is proposed for on-chip bandpass filter (BPF) design with improved passband flatness and stopband suppression. The proposed approach simply uses a combination of meander-line structures with metal-insulator-metal (MIM) capacitors. To demonstrate the insight of this approach, a simplified equivalent LC-circuit model is used for theoretical analysis. Using the analyzed results as a guideline along with a full-wave electromagnetic (EM) simulator, two BPFs are designed and implemented in a standard 0.13-μm (Bi)-CMOS technology. The measured results show that good agreements between EM simulated and measured results are achieved. For the first BPF, the return loss is better than 10 dB from 13.5 to 32 GHz, which indicates a fractional bandwidth (FBW) of more than 78%. In addition, the minimum insertion loss of 2.3 dB is achieved within the frequency range from 17 to 27 GHz and the in-band magnitude ripple is less than 0.1 dB. The chip size of this design, excluding the pads, is 0.148 mm 2 . To demonstrate a miniaturized design, a second design example is given. The return loss is better than 10 dB from 17.3 to 35.9 GHz, which indicates an FBW of more than 70%. In addition, the minimum insertion loss of 2.6 dB is achieved within the frequency range from 21.4 to 27.7 GHz and the in-band magnitude ripple is less than 0.1 dB. The chip size of the second design, excluding the pads, is only 0.066 mm 2 .Peer reviewe

Compact Millimeter-Wave Bandpass Filters Using Quasi-Lumped Elements in 0.13-um (Bi)-CMOS Technology for 5G Wireless Systems

© 2019 IEEE.A design methodology for a compact millimeter-wave on-chip bandpass filter (BPF) is presented in this paper. Unlike the previously published works in the literature, the presented method is based on quasi-lumped elements, which consists of a resonator with enhanced self-coupling and metal-insulator-metal capacitors. Thus, this approach provides inherently compact designs comparing with the conventional distributed elements-based ones. To fully understand the insight of the approach, simplified LC-equivalent circuit models are developed. To further demonstrate the feasibility of using this approach in practice, the resonator and two compact BPFs are designed using the presented models. All three designs are fabricated in a standard 0.13- \mu \text{m} (Bi)-CMOS technology. The measured results show that the resonator can generate a notch at 47 GHz with the attenuation better than 28 dB due to the enhanced self-coupling. The chip size, excluding the pads, is only 0.096 \times 0.294 mm 2. In addition, using the resonator for BPF designs, the first BPF has one transmission zero at 58 GHz with a peak attenuation of 23 dB. The center frequency of this filter is 27 GHz with an insertion loss of 2.5 dB, while the return loss is better than 10 dB from 26 to 31 GHz. The second BPF has two transmission zeros, and a minimum insertion loss of 3.5 dB is found at 29 GHz, while the return loss is better than 10 dB from 26 GHz to 34 GHz. Also, more than 20-dB stopband attenuation is achieved from dc to 20.5 GHz and from 48 to 67 GHz. The chip sizes of these two BPFs, excluding the pads, are only 0.076\times 0.296 mm 2 and 0.096\times 0.296 mm 2, respectively.Peer reviewe

Miniaturized Resonator and Bandpass Filter for Silicon-Based Monolithic Microwave and Millimeter-Wave Integrated Circuits

© 2018 IEEE. © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.This paper introduces a unique approach for the implementation of a miniaturized on-chip resonator and its application for the first-order bandpass filter (BPF) design. This approach utilizes a combination of a broadside-coupling technique and a split-ring structure. To fully understand the principle behind it, simplified LC equivalent-circuit models are provided. By analyzing these models, guidelines for implementation of an ultra-compact resonator and a BPF are given. To further demonstrate the feasibility of using this approach in practice, both the implemented resonator and the filter are fabricated in a standard 0.13-μm (Bi)-CMOS technology. The measured results show that the resonator can generate a resonance at 66.75 GHz, while the BPF has a center frequency at 40 GHz and an insertion loss of 1.7 dB. The chip size of both the resonator and the BPF, excluding the pads, is only 0.012mm 2 (0.08 × 0.144 mm 2).Peer reviewe

MIDAS: Automated Approach to Design Microwave Integrated Inductors and Transformers on Silicon

The design of modern radiofrequency integrated circuits on silicon operating at microwave and millimeter-waves requires the integration of several spiral inductors and transformers that are not commonly available in the process design-kits of the technologies. In this work we present an auxiliary CAD tool for Microwave Inductor (and transformer) Design Automation on Silicon (MIDAS) that exploits commercial simulators and allows the implementation of an automatic design flow, including three-dimensional layout editing and electromagnetic simulations. In detail, MIDAS allows the designer to derive a preliminary sizing of the inductor (transformer) on the bases of the design entries (specifications). It draws the inductor (transformer) layers for the specific process design kit, including vias and underpasses, with or without patterned ground shield, and launches the electromagnetic simulations, achieving effective design automation with respect to the traditional design flow for RFICs. With the present software suite the complete design time is reduced significantly (typically 1 hour on a PC based on Intel® Pentium® Dual 1.80GHz CPU with 2-GB RAM). Afterwards both the device equivalent circuit and the layout are ready to be imported in the Cadence environment

Accurate automatic tuning circuit for bipolar integrated filters

An accurate automatic tuning circuit for tuning the cutoff frequency and Q-factor of high-frequency bipolar filters is presented. The circuit is based on a voltage controlled quadrature oscillator (VCO). The frequency and the RMS (root mean square) amplitude of the oscillator output signal are locked to the frequency and the RMS amplitude of a reference signal, respectively. Special attention is paid to the actual Q-factor in the oscillator. Experimental results for a breadboard circuit operating from 136 to 317 kHz are presente

A monolithic ASIC demonstrator for the Thin Time-of-Flight PET scanner

Time-of-flight measurement is an important advancement in PET scanners to improve image reconstruction with a lower delivered radiation dose. This article describes the monolithic ASIC for the TT-PET project, a novel idea for a high-precision PET scanner for small animals. The chip uses a SiGe Bi-CMOS process for timing measurements, integrating a fully-depleted pixel matrix with a low-power BJT-based front-end per channel, integrated on the same 100 $\mu{} m$ thick die. The target timing resolution is 30 ps RMS for electrons from the conversion of 511 keV photons. A novel synchronization scheme using a patent-pending TDC is used to allow the synchronization of 1.6 million channels across almost 2000 different chips at picosecond-level. A full-featured demonstrator chip with a 3x10 matrix of 500x500 $\mu{} m^{2}$ pixels was produced to validate each block. Its design and experimental results are presented here

Design of Electronic Control Circuit of Piezo-Electric Resonators for sigma delta Modulator Loop in AMS Bi-CMOS 0.35μm

Most of the recent design methodologies of continuous-time sigma-delta modulators use piezo-electric resonators as loop filters. Compared with classical resonators (Gm-c,Gm-LC and etc), piezo-electric resonators have the advantage of high quality factor and accurate resonance frequency. However, they suffer from anti-resonance frequency and impedance adaptation issues with connected electronic circuits. Therefore, their performance is in practice deteriorated. Compatible electronic control circuit is required to achieve expected performance. In this study, the specifications of the electronic control circuit are studied and this circuit is designed in AMS Bi-CMOS 0.35μm technology. the simulations are done at layout-level

Microwave On-Chip Bandpass Filter Based on Hybrid Coupling Technique

© 2018 IEEE. In this paper, a novel on-chip circuit design approach is proposed using hybrid coupling technique. Taking advantage of this technique, a microwave bandpass filter (BPF) is proposed as a design example for proof of concept. Based on stub-loaded stepped-impedance transmission lines and folded stepped-impedance meander line from different metal layers, the proposed BPF can generate three transmission zeros (TZs) and two transmission poles (TPs), which are excited through the hybrid mutual couplings between the inductive and capacitive metals. To understand the principle of this configuration, an equivalent LC-circuit model is presented and simplified, of which the TZs and TPs of the proposed BPF are estimated by the extracted transfer function. The calculated results exhibit good agreements with the simulated and measured ones. In addition, the bandwidth and center frequency of the proposed BPF can be tuned flexibly. Finally, to further demonstrate the feasibility of this approach in practice, the structure is implemented and fabricated in a commercial 0.13- μm SiGe (Bi)-CMOS technology. The measurement results show that the proposed BPF, whose chip size is 0.39 mm × 0.45 mm (excluding the test pads), can realize a wide bandwidth from 19.7 to 33.2 GHz with a return loss of 15.8 dB and insertion loss of 3.8 dB at the center frequency of 26.5 GHz