Photovoltaic stand-alone modular systems, phase 2

The final hardware and system qualification phase of a two part stand-alone photovoltaic (PV) system development is covered. The final design incorporated modular, power blocks capable of expanding incrementally from 320 watts to twenty kilowatts (PK). The basic power unit (PU) was nominally rated 1.28 kWp. The controls units, power collection buses and main lugs, electrical protection subsystems, power switching, and load management circuits are housed in a common control enclosure. Photo-voltaic modules are electrically connected in a horizontal daisy-chain method via Amp Solarlok plugs mating with compatible connectors installed on the back side of each photovoltaic module. A pair of channel rails accommodate the mounting of the modules into a frameless panel support structure. Foundations are of a unique planter (tub-like) configuration to allow for world-wide deployment without restriction as to types of soil. One battery string capable of supplying approximately 240 ampere hours nominal of carryover power is specified for each basic power unit. Load prioritization and shedding circuits are included to protect critical loads and selectively shed and defer lower priority or noncritical power demands. The baseline system, operating at approximately 2 1/2 PUs (3.2 kW pk.) was installed and deployed. Qualification was successfully complete in March 1983; since that time, the demonstration system has logged approximately 3000 hours of continuous operation under load without major incident

Cost modelling and concurrent engineering for testable design

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.As integrated circuits and printed circuit boards increase in complexity, testing becomes a major cost factor of the design and production of the complex devices. Testability has to be considered during the design of complex electronic systems, and automatic test systems have to be used in order to facilitate the test. This fact is now widely accepted in industry. Both design for testability and the usage of automatic test systems aim at reducing the cost of production testing or, sometimes, making it possible at all. Many design for testability methods and test systems are available which can be configured into a production test strategy, in order to achieve high quality of the final product. The designer has to select from the various options for creating a test strategy, by maximising the quality and minimising the total cost for the electronic system. This thesis presents a methodology for test strategy generation which is based on consideration of the economics during the life cycle of the electronic system. This methodology is a concurrent engineering approach which takes into account all effects of a test strategy on the electronic system during its life cycle by evaluating its related cost. This objective methodology is used in an original test strategy planning advisory system, which allows for test strategy planning for VLSI circuits as well as for digital electronic systems. The cost models which are used for evaluating the economics of test strategies are described in detail and the test strategy planning system is presented. A methodology for making decisions which are based on estimated costing data is presented. Results of using the cost models and the test strategy planning system for evaluating the economics of test strategies for selected industrial designs are presented

Printed Circuit Board (PCB) design process and fabrication

This module describes main characteristics of Printed Circuit Boards (PCBs). A brief history of PCBs is introduced in the first chapter. Then, the design processes and the fabrication of PCBs are addressed and finally a study case is presented in the last chapter of the module.Peer ReviewedPostprint (published version

ATLAS silicon module assembly and qualification tests at IFIC Valencia

ATLAS experiment, designed to probe the interactions of particles emerging out of proton proton collisions at energies of up to 14 TeV, will assume operation at the Large Hadron Collider (LHC) at CERN in 2007. This paper discusses the assembly and the quality control tests of forward detector modules for the ATLAS silicon microstrip detector assembled at the Instituto de Fisica Corpuscular (IFIC) in Valencia. The construction and testing procedures are outlined and the laboratory equipment is briefly described. Emphasis is given on the module quality achieved in terms of mechanical and electrical stability.Comment: 23 pages, 38 EPS figures, uses JINST LaTeX clas

Quality assurance program guidelines for application to and use by manufacturers of rail/guideway vehicles, buses, automatic train control systems, and their major subsystems

Guidelines are presented for a quality assurance system to be implemented by the manufacturer in support of designing, developing, fabricating, assembling, inspecting, testing, handling, and delivery of equipment being procured for use in public urban mass transit systems. The guidelines apply to this equipment when being procured for: (1) use in revenue service; (2) demonstration of systems that will be revenue producing or used by the public; (3) use as a prototype for follow-on operational/revenue producing equipment procurements; and (4) qualification tests

Retention and application of Skylab experiences to future programs

The problems encountered and special techniques and procedures developed on the Skylab program are described along with the experiences and practical benefits obtained for dissemination and use on future programs. Three major topics are discussed: electrical problems, mechanical problems, and special techniques. Special techniques and procedures are identified that were either developed or refined during the Skylab program. These techniques and procedures came from all manufacturing and test phases of the Skylab program and include both flight and GSE items from component level to sophisticated spaceflight systems

Assessing the effectiveness of different test approaches for power devices in a PCB

Power electronic systems employing Printed Circuit Boards (PCBs) are broadly used in many applications, including some safety-critical ones. Several standards (e.g., ISO26262 for the automotive sector and DO-178 for avionics) mandate the adoption of effective test procedures for all electronic systems. However, the metrics to be used to compute the effectiveness of the adopted test procedures are not so clearly defined for power devices and systems. In the last years, some commercial fault simulation tools (e.g., DefectSim by Mentor Graphics and TestMAX by Synopsys) for analog circuits have been introduced, together with some new fault models. With these new tools, systematic analog fault simulation finally became practically feasible. The aim of this paper is twofold: first, we propose a method to extend the usage of the new analog fault models to power devices, thus allowing to compute a Fault Coverage figure for a given test. Secondly, we adopt the method on a case study, for which we quantitatively evaluate the effectiveness of some test procedures commonly used at the PCB level for the detection of faults inside power devices. A typical Power Supply Unit (PSU) used in industrial products, including power transistors and power diodes, is considered. The analysis of the gathered results shows that using the new method we can identify the main points of strength / weakness of the different test solutions in a quantitative and deterministic manner, and pinpoint the faults escaping to each one

Electrical termination techniques

A technical review of high reliability electrical terminations for electronic equipment was made. Seven techniques were selected from this review for further investigation, experimental work, and preliminary testing. From the preliminary test results, four techniques were selected for final testing and evaluation. These four were: (1) induction soldering, (2) wire wrap, (3) percussive arc welding, and (4) resistance welding. Of these four, induction soldering was selected as the best technique in terms of minimizing operator errors, controlling temperature and time, minimizing joint contamination, and ultimately producing a reliable, uniform, and reusable electrical termination