Solid-state millimeter wave power generation and amplification Semiannual status report, 1 Sep. 1967 - 29 Feb. 1968

Solid state millimeter wave power generation and amplification studie

Technology Development for the Caltech Submillimeter Observatory Balanced Receivers

The Caltech Submillimeter Observatory (CSO) is located on top of Mauna Kea, Hawaii, at an altitude of 4.2 km. The existing suite of facility heterodyne receivers covering the submillimeter band is rapidly aging and in need of replacement. To facilitate deep integrations and automated spectral line surveys, a family of remote programmable, synthesized, dual-frequency balanced receivers covering the astronomical important 180 - 720 GHz atmospheric windows is in an advanced stage of development. Installation of the first set of receivers is expected in the spring of 2012. Dual-frequency observation will be an important mode of operation offered by the new facility instrumentation. Two band observations are accomplished by separating the H and V polarizations of the incoming signal and routing them via folded optics to the appropriate polarization sensitive balanced mixer. Scientifically this observation mode facilitates pointing for the higher receiver band under mediocre weather conditions and a doubling of scientific throughput (2 x 4 GHz) under good weather conditions.Comment: 12 pages, 17 figures; IEEE Terahertz Science & Technology, January 2012, Volume 2, Issue

Nested chopper stabilization in analog multipliers and mixers

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 97-99).We describe a general offset-cancelling architecture for analog multiplication using chopper stabilization. Chopping is used to modulate the offset away the output signal where it can be easily filtered out, providing continuous offset reduction which is insensitive to drift. Both square wave chopping and chopping with orthogonal spreading codes are tested and shown to reduce the offset down to the microvolt level. In addition, we apply the nested chopping technique to an analog multiplier which employs two levels of chopping to reduce the offset even further. We discuss the limits on the performance of the various chopping methods in detail, and present a detailed analysis of the residual offset due to charge injection spikes. An illustrative CMOS prototype of a chopper-stabilized general-purpose multiplier in a 0.18/pm process is presented which achieves a worst-case offset of 1.5/tV. This is the lowest measured offset reported in the DC analog multiplier literature by a margin of two orders of magnitude. The prototype multiplier is also tested with AC inputs as a squarer, variable gain amplifier, and direct-conversion mixer, demonstrating that chopper stabilization is effective for both DC and AC multiplication. The AC measurements show that chopping removes not only offset, but also 1/f noise and 2nd-order harmonic distortion. The specific application of chopper stabilization to RF direct-conversion mixers is also discussed in detail, showing how it can be used to improve the sensitivity of direct-conversion receivers by reducing the mixer's offset, 1/f noise, and even-order distortion. A prototype IC of a chopper-stabilized RF mixer in a 0.18pm CMOS process is presented, along with measured results.by Philip Godoy.S.M

Frequency Multipliers in SiGe BiCMOS for Local Oscillator Generation in D-band Wireless Transceivers

Communications at millimeter-wave (mm-Wave) have drawn a lot of attention in recent years due to the wide available bandwidth which translates directly to higher data transmission capacity. Generation of the transceivers local oscillation (LO) is critical because many contrasting requirements, i.e. tuning range (TR), phase noise (PN), output power, and level of spurious tones, affect the system performance. Differently from what is commonly pursued at Radio Frequency, LO generation with a PLL embedding a VCO at the desired output frequency is not viable at mm-wave. A more promising approach consists of a PLL in the 10-20GHz range, where silicon VCOs feature the best figure of merit, followed by a frequency multiplier. In this thesis, a frequency multiplication chain is investigated to up-convert an LO signal from X-band to D-band by a multiplication factor of 12. The multiplication is done in steps of 3, 2, and 2. A sextupler chip comprises the tripler and the first doubler and the last doubler stage which upconverts the LO signal from E- to D-band is realized in a separate chip, all in a 55nm SiGe BiCMOS technology. The frequency tripler circuit is based on a novel circuit topology which yields a remarkable improvement on the suppression of the driving signal frequency at the output, compared to conventional designs exploiting transistors in class-C. The active core of the circuit approximates the transfer characteristic of a third-order polynomial that ideally produces only a third-harmonic of the input signal. Implemented in a separate break-out chip and consuming 23mW of DC power, the tripler demonstrates ~40dB suppression of the input signal and its 5th harmonic over 16% fractional bandwidth and robustness to power variation of the driving signal over a 15dB range. Including the E-band doubler, the sextupler chip achieves a peak output power of 1.7dBm at 74.4GHz and remains within 2dB variation from 70GHz to 82GHz, corresponding to 16% fractional BW. In this frequency range, the leakages of all harmonics are suppressed by more than 40dBc. The design of the D-band doubler was aimed at delivering high output power with high efficiency and high conversion gain. Toward this end, the efficiency of a push-push pair was improved by a stacked Colpitts oscillator to boost the power conversion gain by 10dB. Moreover, the common-collector configuration keeps separate the oscillator tank from the load, allowing independent optimization of the harmonic conversion efficiency and the load impedance for maximum power delivery. The measured performance of the test chip demonstrated Pout up to 8dBm at 130GHz with 13dB conversion gain and 6.3% Power Added Efficiency

Effective time-domain approach for the assessment of the stability characteristics and other non-linear effects of RF and microwave circuits

This study describes a systematic approach for the stability analysis of RF and microwave non-linear circuits in the time-domain and that can be useful also for the verification of other non-linearities, like intermodulation. The time-domain analysis is the most reliable approach for the evaluation of complex non-linear phenomena but, in general, the transient behaviour of non-linear circuits is difficult to verify at high frequencies, where distributed elements are common. The solution here addressed overcomes this limitation and it may be applied, without restrictions, also to monolithic microwave integrated circuits and EM-based designs. Examples of application to hybrid prototypes are provided, and the comparison between simulations and measurements illustrates the accuracy and reliability of the proposed approach

Solid-State Microwave Electronics

Contains reports on two research projects.National Aeronautics and Space Administration (Grant NGR-22-009-163

DESIGN OF A GAAS DISTRIBUTED AMPLIFIER WITH LC TRAPS BASED BROADBAND LINEARIZATION

Increasing the linearity of power amplifiers has been an important area of research because its signal integrity influences the performance of the entire transreceiver system and there are strict regulatory requirements on them. Due to the nonlinear behaviour of power amplifiers, third order intermodulation products are generated close to the desired signals and cannot be removed by filters. Increasing linearity will help bring these distortion products closer to the noise floor. However, it is not an easy task to increase linearity without trading off output power. To maintain the same level of output power generated but with higher linearity, many techniques, each with its own pros and cons, have been implemented to linearize an amplifier. Techniques involving feedback are seriously limited in terms of modulation bandwidth whereas methods such as predistortion and feedforward are very difficult to implement. This project seeks to use a simple method of placing terminations directly to the distributed amplifier (DA), making it a device level linearization technique and can be used in addition to the other system level techniques mentioned earlier. To increase linearity over a broad bandwidth of 0.5 to 3.0 GHz, this work proposes using low impedance terminations (LC traps) at the envelope frequency to the input and output of several distributed amplifiers. This research is novel since this is the first time broadband improvement in linearity has been demonstrated using the LC trap method. Two design iterations were completed (first design iteration has four variants to test the output trap while the second design iteration has three variants to test the input trap). The low impedance terminations are implemented using inductor-capacitor networks that are external to the monolithic microwave integrated circuit (MMIC). Design and layout of the DAs were carried out using Agilent’s Advanced Design System (ADS). Results show that placing the traps at the output of the DA does not truly affect the linearity of the device at lower frequencies but provide an improvement of 1.6 dB and 3.4 dB to the third-order output intercept point (OIP3) at 2.5 GHz and 3.0 GHz, respectively. With traps at the input, measurement results at -5 dBm input power, viii 1.375 V base bias (61 mA total collector current) and 10 MHz two tone spacing show a broadband improvement throughout the band (0.5 GHz to 3.0 GHz) of 3.3 dB to 7.4 dB in OIP3. Furthermore, the OIP3 is increased to 19.2 dB above P1dB. Results show that the improvement in OIP3 comes without lowering gain, return loss or P1dB and without causing any stability problems

Heterodyne instrumentation upgrade at the Caltech Submillimeter Observatory

Balanced receivers are under development at the Caltech Submillimeter Observatory (CSO) for the 230/460 GHz and 345/660 GHz atmospheric windows. The mixers are tunerless, implemented in a balanced configuration, have a 4-8 GHz IF, and can be used in dual frequency observation mode. As shall be seen, the balanced arrangement provides a high level of amplitude noise immunity and allows all of the available LO power to be used. In turn, this permits complete automation of the receivers by means of synthesized LO source(s). A disadvantage of balanced mixers is, perhaps, that the sidebands at the IF remain convolved (DSB), unlike sideband separating (2SB) receivers. The latter, however are unbalanced and do not have the noise and LO injection advantages of balanced mixers. For the CSO, balanced mixers covering the range 180-720 GHz were judged most promising to facilitate many of the astrophysical science goals in the years to come. In parallel, a dual polarization 280-420~GHz continuous comparison (correlation) receiver is in an advanced state of development. The instrument has two beams on the sky; a reference and a signal beam. Using only cooled reflecting optics, two polarizing grids, and a quadrature hybrid coupler, the sky beams are coupled to four tunerless SIS mixers (both polarizations). The 4-12 GHz mixer IF outputs are, after amplification, correlated against each other. In principle, this technique results in flat baselines with very low RMS noise, and is especially well suited for high redshift Galaxy work. Not only do these changes greatly enhance the spectroscopic capabilities of the CSO, they will also enable the observatory to be integrated into the Harvard-Smithsonian Submillimeter Array (SMA), as an additional telescope