Design and implementation of an AC voltage regulator based on series power semiconductor array

This thesis describes the use of an array of power semiconductors (series transistor array) and a buck-boost transformer in the design and implementation of a single phase AC voltage regulator. The power semiconductor array was used to act as variable impedance across the bridge points of a rectifier. The input point of the bridge rectifier was also connected directly to the primary winding of the buck-boost transformer. A closed loop circuit was designed using an RMS/DC converter chip, with complete electrical isolation between the low voltage control circuits and the power circuits. The major advantages of this technique are: fast response to RMS voltage fluctuation; waveform fidelity; light weight; and reduced size compared to that of a servo-driven AC voltage regulator such as the PS10 Smart Power Station, which was used in this project as a benchmark for the AC voltage regulator using the power semiconductor array. The device used for testing the performances of both AC voltage regulators was the NoiseKen VDS-2002 Voltage Dip and Swell Simulator. This simulator was used to perform voltage dip, swell, interruption, and variation tests in a manner fully compliant with IEC 61000 – 4 – 11

Modeling and analysis of power processing systems: Feasibility investigation and formulation of a methodology

A review is given of future power processing systems planned for the next 20 years, and the state-of-the-art of power processing design modeling and analysis techniques used to optimize power processing systems. A methodology of modeling and analysis of power processing equipment and systems has been formulated to fulfill future tradeoff studies and optimization requirements. Computer techniques were applied to simulate power processor performance and to optimize the design of power processing equipment. A program plan to systematically develop and apply the tools for power processing systems modeling and analysis is presented so that meaningful results can be obtained each year to aid the power processing system engineer and power processing equipment circuit designers in their conceptual and detail design and analysis tasks

Analysis on Supercapacitor Assisted Low Dropout (SCALDO) Regulators

State-of-the-art electronic systems employ three fundamental techniques for DC-DC converters: (a) switch-mode power supplies (SMPS); (b) linear power supplies; (c) switched capacitor (charge pump) converters. In practical systems, these three techniques are mixed to provide a complex, but elegant, overall solution, with energy efficiency, effective PCB footprint, noise and transient performance to suit different electronic circuit blocks. Switching regulators have relatively high end-to-end efficiency, in the range of 70 to 93%, but can have issues with output noise and EMI/RFI emissions. Switched capacitor converters use a set of capacitors for energy storage and conversion. In general, linear regulators have low efficiencies in the range 30 to 60%. However, they have outstanding output characteristics such as low noise, excellent transient response to load current fluctuations, design simplicity and low cost design which are far superior to SMPS. Given the complex situation in switch-mode converters, low dropout (LDO) regulators were introduced to address the equirements of noise-sensitive and fast transient loads in portable devices. A typical commercial off-the-shelf LDO has its input voltage slightly higher than the desired regulated output for optimal efficiency. The approximate efficiency of a linear regulator, if the power consumed by the control circuits is negligible, can be expressed by the ratio of Vo/Vin. A very low frequency supercapacitor circulation technique can be combined with commercial low dropout regulator ICs to significantly increase the end-to-end efficiency by a multiplication factor in the range of 1.33 to 3, compared to the efficiency of a linear regulator circuit with the same input-output voltages. In this patented supercapacitor-assisted low dropout (SCALDO) regulator technique developed by a research team at the University of Waikato, supercapacitors are used as lossless voltage droppers, and the energy reuse occurs at very low frequencies in the range of less than ten hertz, eliminating RFI/EMI concerns. This SCALDO technique opens up a new approach to design step-down, DC-DC converters suitable for processor power supplies with very high end-to-end efficiency which is closer to the efficiencies of practical switching regulators, while maintaining the superior output specifications of a linear design. Furthermore, it is important to emphasize that the SCALDO technique is not a variation of well-known switched capacitor DC-DC converters. In this thesis, the basic SCALDO concept is further developed to achieve generalised topologies, with the relevant theory that can be applied to a converter with any input-output step-down voltage combination. For these generalised topologies, some important design parameters, such as the number of supercapacitors, switching matrix details and efficiency improvement factors, are derived to form the basis of designing SCALDO regulators. With the availability of commercial LDO ICs with output current ratings up to 10 A, and thin-prole supercapacitors with DC voltage ratings from 2.3 to 5.5 V, several practically useful, medium-current SCALDO prototypes: 12V-to-5V, 5V-to-2V, 5.5V-to-3.3V have been developed. Experimental studies were carried out on these SCALDO prototypes to quantify performance in terms of line regulation, load regulation, efficiency and transient response. In order to accurately predict the performance and associated waveforms of the individual phases (charge, discharge and transition) of the SCALDO regulator, Laplace transform-based theory for supercapacitor circulation is developed, and analytical predictions are compared with experimental measurements for a 12V-to-5V prototype. The analytical results tallied well with the practical waveforms observed in a 12V-to-5V converter, indicating that the SCALDO technique can be generalized to other versatile configurations, and confirming that the simplified assumptions used to describe the circuit elements are reasonable and justifiable. After analysing the performance of several SCALDO prototypes, some practical issues in designing SCALDO regulators have been identified. These relate to power losses and implications for future development of the SCALDO design

High power linear AC Electronic Load for testing UPS Systems

Concept of a series bipolar transistor array for AC power control is already developed. However non-linearity issues, high power capability with load sharing at high voltages and digital control with better transient performance were not adequately adopted in early-developed stages. This thesis is a description of the design approach of digitally controllable linear 230V/50 Hz AC line voltage capable electronic load with predictable characteristics based on spice simulation. The BJT array used in this project provides high power dissipation capability and uniform voltage and power distribution across the individual transistors. A set of optoisolators are used to have electrical isolation between power stage and digital control circuits. A Zilog Z8Encore! 64K series development kit is used in controlling the circuit

A POWER DISTRIBUTION SYSTEM BUILT FOR A VARIETY OF UNATTENDED ELECTRONICS

A power distribution system (PDS) delivers electrical power to a load safely and effectively in a pre-determined format. Here format refers to necessary voltages, current levels and time variation of either as required by the empowered system. This formatting is usually referred as "conditioning". The research reported in this dissertation presents a complete system focusing on low power energy harvesting, conditioning, storage and regulation. Energy harvesting is a process by which ambient energy present in the environment is captured and converted to electrical energy. In recent years, it has become a prominent research area in multiple disciplines. Several energy harvesting schemes have been exploited in the literature, including solar energy, mechanic energy, radio frequency (RF) energy, thermal energy, electromagnetic energy, biochemical energy, radioactive energy and so on. Different from the large scale energy generation, energy harvesting typically operates in milli-watts or even micro-watts power levels. Almost all energy harvesting schemes require stages of power conditioning and intermediate storage - batteries or capacitors that reservoir energy harvested from the environment. Most of the ambient energy fluctuates and is usually weak. The purpose of power conditioning is to adjust the format of the energy to be further used, and intermediate storage smoothes out the impact of the fluctuations on the power delivered to the load. This dissertation reports an end to end power distribution system that integrates different functional blocks including energy harvesting, power conditioning, energy storage, output regulation and system control. We studied and investigated different energy harvesting schemes and the dissertation places emphasis on radio frequency energy harvesting. This approach has proven to be a viable power source for low-power electronics. However, it is still challenging to obtain significant amounts of energy rapidly and efficiently from the ambient. Available RF power is usually very weak, leading to low voltage applied to the electronics. The power delivered to the PDS is hard to utilize or store. This dissertation presents a configuration including a wideband rectenna, a switched capacitor voltage boost converter and a thin film flexible battery cell that can be re-charged at an exceptionally low voltage. We demonstrate that the system is able to harvest energy from a commercially available hand-held communication device at an overall efficiency as high as 7.7 %. Besides the RF energy harvesting block, the whole PDS includes a solar energy harvesting block, a USB recharging block, a customer selection block, two battery arrays, a control block and an output block. The functions of each of the blocks have been tested and verified. The dissertation also studies and investigates several potential applications of this PDS. The applications we exploited include an ultra-low power tunable neural oscillator, wireless sensor networks (WSNs), medical prosthetics and small unmanned aerial vehicles (UAVs). We prove that it is viable to power these potential loads through energy harvesting from multiple sources

The state-of-the-art of dc power distribution systems/components for space applications

This report is a survey of the state of the art of high voltage dc systems and components. This information can be used for consideration of an alternative secondary distribution (120 Vdc) system for the Space Station. All HVdc components have been prototyped or developed for terrestrial, aircraft, and spacecraft applications, and are applicable for general space application with appropriate modification and qualification. HVdc systems offer a safe, reliable, low mass, high efficiency and low EMI alternative for Space Station secondary distribution

Doctor of Philosophy

dissertationSince the late 1950s, scientists have been working toward realizing implantable devices that would directly monitor or even control the human body's internal activities. Sophisticated microsystems are used to improve our understanding of internal biological processes in animals and humans. The diversity of biomedical research dictates that microsystems must be developed and customized specifically for each new application. For advanced long-term experiments, a custom designed system-on-chip (SoC) is usually necessary to meet desired specifications. Custom SoCs, however, are often prohibitively expensive, preventing many new ideas from being explored. In this work, we have identified a set of sensors that are frequently used in biomedical research and developed a single-chip integrated microsystem that offers the most commonly used sensor interfaces, high computational power, and which requires minimum external components to operate. Included peripherals can also drive chemical reactions by setting the appropriate voltages or currents across electrodes. The SoC is highly modular and well suited for prototyping in and ex vivo experimental devices. The system runs from a primary or secondary battery that can be recharged via two inductively coupled coils. The SoC includes a 16-bit microprocessor with 32 kB of on chip SRAM. The digital core consumes 350 μW at 10 MHz and is capable of running at frequencies up to 200 MHz. The integrated microsystem has been fabricated in a 65 nm CMOS technology and the silicon has been fully tested. Integrated peripherals include two sigma-delta analog-to-digital converters, two 10-bit digital-to-analog converters, and a sleep mode timer. The system also includes a wireless ultra-wideband (UWB) transmitter. The fullydigital transmitter implementation occupies 68 x 68 μm2 of silicon area, consumes 0.72 μW static power, and achieves an energy efficiency of 19 pJ/pulse at 200 MHz pulse repetition frequency. An investigation of the suitability of the UWB technology for neural recording systems is also presented. Experimental data capturing the UWB signal transmission through an animal head are presented and a statistical model for large-scale signal fading is developed

Hardware Realization of a Residential Static Var Compensator

Conservation by Voltage Reduction (CVR) is the implementation of a distribution voltage strategy whereby all distribution voltages are lowered to the minimum allowed by the equipment manufacturer. This strategy is rooted in the fact that many loads consume less power when they are fed with a voltage lower than nominal. Electric utility companies consider CVR as a potential solution for managing power in distribution networks. However, a difficult challenge is to keep end-of-line (EOL) voltages within an acceptable range of the ANSI Standard C84.1. Therefore, to achieve maximum benefit from CVR, electric utilities should be able to regulate residential voltages depending on load requirements. Hence, there is a need for a local solution which can regulate residential voltage levels from the first customer on the distribution feeder until the EOL of the distribution network. Such a solution will not only provide flexibility to electric utilities for better control over residential voltages but it can also maximize the benefits from CVR. The goal of this research is to develop a Residential Static Var Compensator (RSVC) that will allow electric utility companies to develop strategies for CVR and other applications. The proposed RSVC is in fact a reactive power compensator that can regulate a residential load voltage with a fixed capacitor in shunt with a reactor controlled by two bidirectional switches. The two switches are turned on and off in a complementary manner using a pulse-width modulation (PWM) technique that allows the reactor to function as a continuously-variable inductor. The proposed RSVC has several advantages compared to a conventional thyristor-based static var compensator (SVC), such as a quasi-sinusoidal inductor current, sub-cycle reactive power controllability, lower footprint for reactive components, and its realization as a single-phase device

Efficiency enhancement to a linear AC voltage regulator: Multi-winding versus multi-transformer design

Electricity distribution companies are required to supply electric power, which conforms to accepted standards, that place limits on voltage fluctuations beyond nominal values. However, it is common for these fluctuations to exceed the specified standards. One solution to this problem is to install stand-alone RMS voltage regulators at the consumer site. Commonly available AC regulators typically have limitations such as slow response time, flattened sine wave output, low efficiency, and limited operating range. The linear AC voltage regulator is a relatively new type of solid-state, single-phase AC regulator for consumer-end, which addresses most of the above issues. It is based on a series transistor-array coupled with a line-frequency transformer that works seamlessly from boost-to-buck mode in the range of 0.8−1.1 per-unit values of line voltage, without a need of any transformer configuration changes. However, previous prototypes exhibited reduced efficiency when the line voltage exceeded the nominal value. This paper presents two alternative designs that achieve efficiencies of 90−95%, usually required in commercial implementation. Analytical and experimental results of a multi-winding versus multi-transformer based prototypes of 300VA output capacity are presented