Investigation of high bandwith biodevices for transcutaneous wireless telemetry

PhD ThesisBIODEVICE implants for telemetry are increasingly applied today in various areas applications. There are many examples such as; telemedicine, biotelemetry, health care, treatments for chronic diseases, epilepsy and blindness, all of which are using a wireless infrastructure environment. They use microelectronics technology for diagnostics or monitoring signals such as Electroencephalography or Electromyography. Conceptually the biodevices are defined as one of these technologies combined with transcutaneous wireless implant telemetry (TWIT). A wireless inductive coupling link is a common way for transferring the RF power and data, to communicate between a reader and a battery-less implant. Demand for higher data rate for the acquisition data returned from the body is increasing, and requires an efficient modulator to achieve high transfer rate and low power consumption. In such applications, Quadrature Phase Shift Keying (QPSK) modulation has advantages over other schemes, and double the symbol rate with respect to Binary Phase Shift Keying (BPSK) over the same spectrum band. In contrast to analogue modulators for generating QPSK signals, where the circuit complexity and power dissipation are unsuitable for medical purposes, a digital approach has advantages. Eventually a simple design can be achieved by mixing the hardware and software to minimize size and power consumption for implantable telemetry applications. This work proposes a new approach to digital modulator techniques, applied to transcutaneous implantable telemetry applications; inherently increasing the data rate and simplifying the hardware design. A novel design for a QPSK VHDL modulator to convey a high data rate is demonstrated. Essentially, CPLD/FPGA technology is used to generate hardware from VHDL code, and implement the device which performs the modulation. This improves the data transmission rate between the reader and biodevice. This type of modulator provides digital synthesis and the flexibility to reconfigure and upgrade with the two most often languages used being VHDL and Verilog (IEEE Standard) being used as hardware structure description languages. The second objective of this thesis is to improve the wireless coupling power (WCP). An efficient power amplifier was developed and a new algorithm developed for auto-power control design at the reader unit, which monitors the implant device and keeps the device working within the safety regulation power limits (SAR). The proposed system design has also been modeled and simulated with MATLAB/Simulink to validate the modulator and examine the performance of the proposed modulator in relation to its specifications.Higher Education Ministry in Liby

High-performance wireless power and data transfer interface for implantable medical devices

D’importants progès ont été réalisés dans le développement des systèmes biomédicaux implantables grâce aux dernières avancées de la microélectronique et des technologies sans fil. Néanmoins, ces appareils restent difficiles à commercialier. Cette situation est due particulièrement à un manque de stratégies de design capable supporter les fonctionnalités exigées, aux limites de miniaturisation, ainsi qu’au manque d’interface sans fil à haut débit fiable et faible puissance capable de connecter les implants et les périphériques externes. Le nombre de sites de stimulation et/ou d’électrodes d’enregistrement retrouvés dans les dernières interfaces cerveau-ordinateur (IMC) ne cesse de croître afin d’augmenter la précision de contrôle, et d’améliorer notre compréhension des fonctions cérébrales. Ce nombre est appelé à atteindre un millier de site à court terme, ce qui exige des débits de données atteingnant facilement les 500 Mbps. Ceci étant dit, ces travaux visent à élaborer de nouvelles stratégies innovantes de conception de dispositifs biomédicaux implantables afin de repousser les limites mentionnées ci-dessus. On présente de nouvelles techniques faible puissance beaucoup plus performantes pour le transfert d’énergie et de données sans fil à haut débit ainsi que l’analyse et la réalisation de ces dernières grâce à des prototypes microélectroniques CMOS. Dans un premier temps, ces travaux exposent notre nouvelle structure multibobine inductive à résonance présentant une puissance sans fil distribuée uniformément pour alimenter des systèmes miniatures d’étude du cerveaux avec des models animaux en ilberté ainsi que des dispositifs médicaux implantbles sans fil qui se caractérisent par une capacité de positionnement libre. La structure propose un lien de résonance multibobines inductive, dont le résonateur principal est constitué d’une multitude de résonateurs identiques disposés dans une matrice de bobines carrées. Ces dernières sont connectées en parallèle afin de réaliser des surfaces de puissance (2D) ainsi qu’une chambre d’alimentation (3D). La chambre proposée utilise deux matrices de résonateurs de base, mises face à face et connectés en parallèle afin d’obtenir une distribution d’énergie uniforme en 3D. Chaque surface comprend neuf bobines superposées, connectées en parallèle et réailsées sur une carte de circuit imprimé deux couches FR4. La chambre dispose d’un mécanisme naturel de localisation de puissance qui facilite sa mise en oeuvre et son fonctionnement. En procédant ainsi, nous évitons la nécessité d’une détection active de l’emplacement de la charge et le contrôle d’alimentation. Notre approche permet à cette surface d’alimentation unique de fournir une efficacité de transfert de puissance (PTE) de 69% et une puissance délivrée à la charge (PDL) de 120 mW, pour une distance de séparation de 4 cm, tandis que le prototype de chambre complet fournit un PTE uniforme de 59% et un PDL de 100 mW en 3D, partout à l’intérieur de la chambre avec un volume de chambre de 27 × 27 × 16 cm3. Une étape critique avant d’utiliser un dispositif implantable chez les humains consiste à vérifier ses fonctionnalités sur des sujets animaux. Par conséquent, la chambre d’énergie sans fil conçue sera utilisée afin de caractériser les performances d’ une interface sans fil de transmisison de données dans un environnement réaliste in vivo avec positionement libre. Un émetteur-récepteur full-duplex (FDT) entièrement intégré qui se caractérise par sa faible puissance est conçu pour réaliser une interfaces bi-directionnelles (stimulation et enregistrement) avec des débits asymétriques: des taux de tramnsmission plus élevés sont nécessaires pour l’enregistrement électrophysiologique multicanal (signaux de liaison montante) alors que les taux moins élevés sont utilisés pour la stimulation (les signaux de liaison descendante). L’émetteur (TX) et le récepteur (RX) se partagent une seule antenne afin de réduire la taille de l’implant. L’émetteur utilise la radio ultra-large bande par impulsions (IR-UWB) basée sur l’approche edge combining et le RX utilise la bande ISM (Industrielle, Scientifique et Médicale) de fréquence central 2.4 GHz et la modulation on-off-keying (OOK). Une bonne isolation (> 20 dB) est obtenue entre le TX et le RX grâce à 1) la mise en forme les impulsions émises dans le spectre UWB non réglementée (3.1-7 GHz), et 2) le filtrage espace-efficace (évitant l’utilisation d’un circulateur ou d’un diplexeur) du spectre du lien de communication descendant directement au niveau de l’ amplificateur à faible bruit (LNA). L’émetteur UWB 3.1-7 GHz utilise un e modultion OOK ainsi qu’une modulation par déplacement de phase (BPSK) à seulement 10.8 pJ / bits. Le FDT proposé permet d’atteindre 500 Mbps de débit de données en lien montant et 100 Mbps de débit de données de lien descendant. Il est entièrement intégré dans un procédé TSMC CMOS 0.18 um standard et possède une taille totale de 0.8 mm2. La consommation totale d’énergie mesurée est de 10.4 mW (5 mW pour RX et 5.4 mW pour TX au taux de 500 Mbps).In recent years, there has been major progress on implantable biomedical systems that support most of the functionalities of wireless implantable devices. Nevertheless, these devices remain mostly restricted to be commercialized, in part due to weakness of a straightforward design to support the required functionalities, limitation on miniaturization, and lack of a reliable low-power high data rate interface between implants and external devices. This research provides novel strategies on the design of implantable biomedical devices that addresses these limitations by presenting analysis and techniques for wireless power transfer and efficient data transfer. The first part of this research includes our proposed novel resonance-based multicoil inductive power link structure with uniform power distribution to wirelessly power up smart animal research systems and implanted medical devices with high power efficiency and free positioning capability. The proposed structure consists of a multicoil resonance inductive link, which primary resonator array is made of several identical resonators enclosed in a scalable array of overlapping square coils that are connected in parallel and arranged in power surface (2D) and power chamber (3D) configurations. The proposed chamber uses two arrays of primary resonators, facing each other, and connected in parallel to achieve uniform power distribution in 3D. Each surface includes 9 overlapped coils connected in parallel and implemented into two layers of FR4 printed circuit board. The chamber features a natural power localization mechanism, which simplifies its implementation and eases its operation by avoiding the need for active detection of the load location and power control mechanisms. A single power surface based on the proposed approach can provide a power transfer efficiency (PTE) of 69% and a power delivered to the load (PDL) of 120 mW, for a separation distance of 4 cm, whereas the complete chamber prototype provides a uniform PTE of 59% and a PDL of 100 mW in 3D, everywhere inside the chamber with a chamber size of 27×27×16 cm3. The second part of this research includes our proposed novel, fully-integrated, low-power fullduplex transceiver (FDT) to support bi-directional neural interfacing applications (stimulating and recording) with asymmetric data rates: higher rates are required for recording (uplink signals) than stimulation (downlink signals). The transmitter (TX) and receiver (RX) share a single antenna to reduce implant size. The TX uses impulse radio ultra-wide band (IR-UWB) based on an edge combining approach, and the RX uses a novel 2.4-GHz on-off keying (OOK) receiver. Proper isolation (> 20 dB) between the TX and RX path is implemented 1) by shaping the transmitted pulses to fall within the unregulated UWB spectrum (3.1-7 GHz), and 2) by space-efficient filtering (avoiding a circulator or diplexer) of the downlink OOK spectrum in the RX low-noise amplifier (LNA). The UWB 3.1-7 GHz transmitter using OOK and binary phase shift keying (BPSK) modulations at only 10.8 pJ/bit. The proposed FDT provides dual band 500 Mbps TX uplink data rate and 100 Mbps RX downlink data rate. It is fully integrated on standard TSMC 0.18 nm CMOS within a total size of 0.8 mm2. The total power consumption measured 10.4 mW (5 mW for RX and 5.4 mW for TX at the rate of 500 Mbps)

An Ultra-Low-Power RFID/NFC Frontend IC Using 0.18 μm CMOS Technology for Passive Tag Applications

Battery-less passive sensor tags based on RFID or NFC technology have achieved much popularity in recent times. Passive tags are widely used for various applications like inventory control or in biotelemetry. In this paper, we present a new RFID/NFC frontend IC (integrated circuit) for 13.56 MHz passive tag applications. The design of the frontend IC is compatible with the standard ISO 15693/NFC 5. The paper discusses the analog design part in details with a brief overview of the digital interface and some of the critical measured parameters. A novel approach is adopted for the demodulator design, to demodulate the 10% ASK (amplitude shift keying) signal. The demodulator circuit consists of a comparator designed with a preset offset voltage. The comparator circuit design is discussed in detail. The power consumption of the bandgap reference circuit is used as the load for the envelope detection of the ASK modulated signal. The sub-threshold operation and low-supply-voltage are used extensively in the analog design—to keep the power consumption low. The IC was fabricated using 0.18 μ m CMOS technology in a die area of 1.5 mm × 1.5 mm and an effective area of 0.7 m m 2 . The minimum supply voltage desired is 1.2 V, for which the total power consumption is 107 μ W. The analog part of the design consumes only 36 μ W, which is low in comparison to other contemporary passive tags ICs. Eventually, a passive tag is developed using the frontend IC, a microcontroller, a temperature and a pressure sensor. A smart NFC device is used to readout the sensor data from the tag employing an Android-based application software. The measurement results demonstrate the full passive operational capability. The IC is suitable for low-power and low-cost industrial or biomedical battery-less sensor applications. A figure-of-merit (FOM) is proposed in this paper which is taken as a reference for comparison with other related state-of-the-art researches

A self-powered single-chip wireless sensor platform

Internet of things” require a large array of low-cost sensor nodes, wireless connectivity, low power operation and system intelligence. On the other hand, wireless biomedical implants demand additional specifications including small form factor, a choice of wireless operating frequencies within the window for minimum tissue loss and bio-compatibility This thesis describes a low power and low-cost internet of things system suitable for implant applications that is implemented in its entirety on a single standard CMOS chip with an area smaller than 0.5 mm2. The chip includes integrated sensors, ultra-low-power transceivers, and additional interface and digital control electronics while it does not require a battery or complex packaging schemes. It is powered through electromagnetic (EM) radiation using its on-chip miniature antenna that also assists with transmit and receive functions. The chip can operate at a short distance (a few centimeters) from an EM source that also serves as its wireless link. Design methodology, system simulation and optimization and early measurement results are presented

Wireless power and data transmission to high-performance implantable medical devices

Novel techniques for high-performance wireless power transmission and data interfacing with implantable medical devices (IMDs) were proposed. Several system- and circuit-level techniques were developed towards the design of a novel wireless data and power transmission link for a multi-channel inductively-powered wireless implantable neural-recording and stimulation system. Such wireless data and power transmission techniques have promising prospects for use in IMDs such as biosensors and neural recording/stimulation devices, neural interfacing experiments in enriched environments, radio-frequency identification (RFID), smartcards, near-field communication (NFC), wireless sensors, and charging mobile devices and electric vehicles. The contributions in wireless power transfer are the development of an RFID-based closed-loop power transmission system, a high-performance 3-coil link with optimal design procedure, circuit-based theoretical foundation for magnetic-resonance-based power transmission using multiple coils, a figure-of-merit for designing high-performance inductive links, a low-power and adaptive power management and data transceiver ASIC to be used as a general-purpose power module for wireless electrophysiology experiments, and a Q-modulated inductive link for automatic load matching. In wireless data transfer, the contributions are the development of a new modulation technique called pulse-delay modulation for low-power and wideband near-field data communication and a pulse-width-modulation impulse-radio ultra-wideband transceiver for low-power and wideband far-field data transmission.Ph.D

Front End of a 900MHz RFID for Biological Sensing

This thesis presents the front end of a 900MHz passive RFID for biological sensing. The components blocks of the front end consist of power harvester, switch capacitor voltage regulator, phase lock loop and a modulator and demodulator. As the RFID is passive so the power resource is limited hence the main focus while implementing all the block was low power and high efficiency power conversion. All the individual block were optimized to provide maximum efficiency. For the harvester to achieve high efficiency and high output voltage a design approach is discussed by which the device sizes are optimized and the values of the matching network components are solved. The efficiency achieved with this approach is 34% while supplying 74�[email protected]. The switch capacitor voltage regulator would supply power to the digital core of the RFID, which will operate at subtheshold or moderate inversion. The switch capacitor implemented in this work is a adaptive voltage regulator, as I intend to use the dynamic supply voltage scaling technique to compensate for the reduction in reliability of performance of the circuit due to variation of VTH across process due to random doping effects and temperature in subthreshold.The phase lock loop (PLL) block in this front end provide the system clock synchronized with the base station to all the backend blocks like the digital controller, memory, and the analog to digital converter ADC and the switch capacitor voltage regulator. The PLL is a low power with jitter of 24nsec and is capable of clock data recovery from EPC gen 2 protocol format data and consumes 3�W of power Finally a ultra low power AM (amplitude modulation) demodulator is presented which is consumes only 100nW and is capable of demodulating a double-sideband amplitude modulated (DSB-AM) signal centered at 900MHz and the modulating frequency is 160KHz. The demodulator can demodulate signal having as low as -5dBm power and 50% modulation index. The modulation for transmitting signal is achieved by BPSK(back scatter phase shift keying).Electrical Engineerin