Operation of an optoelectronic crossbar switch containing a terabit-per-second free-space optical interconnect

The experimental operation of a terabit-per-second scale optoelectronic connection to a silicon very-large-scale-integrated circuit is described. A demonstrator system, in the form of an optoelectronic crossbar switch, has been constructed as a technology test bed. The assembly and testing of the components making up the system, including a flip-chipped InGaAs-GaAs optical interface chip, are reported. Using optical inputs to the electronic switching chip, single-channel routing of data through the system at the design rate of 250 Mb/s (without internal fan-out) was achieved. With 4000 optical inputs, this corresponds to a potential aggregate data input of a terabit per second into the single 14.6 /spl times/ 15.6 mm CMOS chip. In addition 50-Mb/s data rates were switched utilizing the full internal optical fan-out included in the system to complete the required connectivity. This simultaneous input of data across the chip corresponds to an aggregate data input of 0.2 Tb/s. The experimental system also utilized optical distribution of clock signals across the CMOS chip

Towards demonstration of photonic payload for telecom satellites

To address the challenges of the Digital Agenda for Europe (DAE) and also to remain in line with the evolution of terrestrial communications in a globally connected world, a major increase in telecoms satellites capacity is required in the near future. With telecom satellites payloads based on traditional RF equipment, increase in capacity and flexibility has always translated into a more or less linear increase in equipment count, mass, power consumption and power dissipation. The main challenge of next generation of High Throughput Satellites (HTS) is therefore to provide a ten-fold-increased capacity with enhanced flexibility while maintaining the overall satellite within a "launchable" volume and mass envelope [1], [2], [3]. Photonic is a very promising technology to overcome the above challenges. The ability of Photonic to handle high data rates and high frequencies, as well as enabling reduced size, mass, immunity to EMI and ease of harness routing (by using fibre-optic cables) is critical in this scenario

The rising role of photonics in today's data centres

In recent years there has been a rapid growth in demand for ultra high speed data transmission with end users expecting fast, high bandwidth network access. This growth has put data centres under increasing pressure to provide greater data throughput and ever increasing data rates while at the same time improving the quality of data handling in terms of reduced latency, increased scalability and improved channel speed for users. However, data networks are becoming increasingly difficult to scale to meet this growing demand using current well established CMOS technology and architectures. As a result electronic bottlenecks are becoming apparent despite improvements in data management. The inter-related issues of electronic scalability, power consumption, copper interconnect bandwidth and the limited speed of CMOS electronics will be discussed; and the tremendous potential of optical fibre based networks to provide the necessary bandwidth will be illustrated. In addition, some applications of photonics to alleviate speed, throughput and latency issues in data networks will be discussed. Finally, progress in the form of a novel and highly scalable optical interconnect will be reviewed

Analysis of terabit/second-class inter-chip parallel optoelectronic transceiver

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2010.Cataloged from student submitted PDF version of thesis.Includes bibliographical references (p. 89-92).Electrical copper-based interconnect has been suffering from fundamental physical loss mechanism and its current infrastructure will not be able to meet the increasing demand for data rates due to reaching the limit of the transmission bandwidth-distance product. Optical interconnect has been known as the candidate for taking over the obsolete electrical counterpart owing to the capability of transmitting data at high rates with low loss and the feasibility for parallel integration. Optoelectronic transceiver is one of the essential elements in optical interconnect system. This thesis scrutinizes a complete set of constituent technologies developed for a novel inter-chip parallel optoelectronic (OE) transceiver (known as Terabus transceiver) which is able to communicate data at the speed in the range of Terabit/second. A novel packaging hierarchy and a creative design for an optical coupling mechanism devised to bring high-level integration and high-speed performance to a final package have been analyzed: Two 4x12 arrays (each < 9 mm2) of CMOS transmitter and receiver ICs have been flip-chip bonded to a silicon carrier interposer of 1.2-cm2 size. Other two 4x12 arrays of OE devices (VCSELs and photodiodes) with comparable size are then flip-chip bonded to the corresponding CMOS arrays attached to the silicon carrier, forming the Optochip assembly. The Optochip is in interface with an Optocard by the flip-chip bonding process between the silicon carrier and an organic card patterned with 48 integrated waveguides at density of 16-channel/mm and total length of 30 cm. The 985-nm operating wavelength of the lasers allows a simple optical design with emission and illumination through arrays of relay lenses directly etched into the backside of the OE Ill-V substrate. A novel design of 45*-tilted and Au-coated mirrors fabricated in 125-ptmpitch acrylate waveguides is to perpendicularly couple the light in and out of the core of these Optocard waveguides. Per-channel performance of up to 20 Gb/s for transmitter and of up to 14 Gb/s for receiver have been realized. Lastly, the thesis has analyzed the market opportunity of the transceiver by reviewing the market situation, identifying contemporary competing technologies, assessing the market prospect and predicting the cost.by Nguyen Hoang Nguyen.M.Eng

High capacity photonic integrated switching circuits

As the demand for high-capacity data transfer keeps increasing in high performance computing and in a broader range of system area networking environments; reconfiguring the strained networks at ever faster speeds with larger volumes of traffic has become a huge challenge. Formidable bottlenecks appear at the physical layer of these switched interconnects due to its energy consumption and footprint. The energy consumption of the highly sophisticated but increasingly unwieldy electronic switching systems is growing rapidly with line rate, and their designs are already being constrained by heat and power management issues. The routing of multi-Terabit/second data using optical techniques has been targeted by leading international industrial and academic research labs. So far the work has relied largely on discrete components which are bulky and incurconsiderable networking complexity. The integration of the most promising architectures is required in a way which fully leverages the advantages of photonic technologies. Photonic integration technologies offer the promise of low power consumption and reduced footprint. In particular, photonic integrated semiconductor optical amplifier (SOA) gate-based circuits have received much attention as a potential solution. SOA gates exhibit multi-terahertz bandwidths and can be switched from a high-gain state to a high-loss state within a nanosecond using low-voltage electronics. In addition, in contrast to the electronic switching systems, their energy consumption does not rise with line rate. This dissertation will discuss, through the use of different kind of materials and integration technologies, that photonic integrated SOA-based optoelectronic switches can be scalable in either connectivity or data capacity and are poised to become a key technology for very high-speed applications. In Chapter 2, the optical switching background with the drawbacks of optical switches using electronic cores is discussed. The current optical technologies for switching are reviewed with special attention given to the SOA-based switches. Chapter 3 discusses the first demonstrations using quantum dot (QD) material to develop scalable and compact switching matrices operating in the 1.55µm telecommunication window. In Chapter 4, the capacity limitations of scalable quantum well (QW) SOA-based multistage switches is assessed through experimental studies for the first time. In Chapter 5 theoretical analysis on the dependence of data integrity as ultrahigh line-rate and number of monolithically integrated SOA-stages increases is discussed. Chapter 6 presents some designs for the next generation of large scale photonic integrated interconnects. A 16x16 switch architecture is described from its blocking properties to the new miniaturized elements proposed. Finally, Chapter 7 presents several recommendations for future work, along with some concluding remark

Photonic Integrated Semiconductor Optical Amplifier Switch Circuits

No abstract