HEAL-WEAR: an Ultra-Low Power Heterogeneous System for Bio-Signal Analysis

Personalized healthcare devices enable low-cost, unobtrusive and long-term acquisition of clinically-relevant biosignals. These appliances, termed Wireless Body Sensor Nodes (WBSNs), are fostering a revolution in health monitoring for patients affected by chronic ailments. Nowadays, WBSNs often embed complex digital processing routines, which must be performed within an extremely tight energy budget. Addressing this challenge, in this paper we introduce a novel computing architecture devoted to the ultra-low power analysis of biosignals. Its heterogeneous structure comprises multiple processors interfaced with a shared acceleration resource, implemented as a Coarse Grained Reconfigurable Array (CGRA). The CGRA mesh effectively supports the execution of the intensive loops that characterize bio-signal analysis applications, while requiring a low reconfiguration overhead. Moreover, both the processors and the reconfigurable fabric feature Single-Instruction / Multiple- Data (SIMD) execution modes, which increase efficiency when multiple data streams are concurrently processed. The run-time behavior on the system is orchestrated by a light-weight hardware mechanism, which concurrently synchronizes processors for SIMD execution and regulates access to the reconfigurable accelerator. By jointly leveraging run-time reconfiguration and SIMD execution, the illustrated heterogeneous system achieves, when executing complex bio-signal analysis applications, speedups of up to 11.3x on the considered kernels and up to 37.2% overall energy savings, with respect to an ultra-low power multicore platform which does not feature CGRA acceleration

A High-Accuracy and Power-Efficient Self-Optimizing Wireless Water Level Monitoring IoT Device for Smart City

In this paper; a novel self-optimizing water level monitoring methodology is proposed for smart city applications. Considering system maintenance; the efficiency of power consumption and accuracy will be important for Internet of Things (IoT) devices and systems. A multi-step measurement mechanism and power self-charging process are proposed in this study for improving the efficiency of a device for water level monitoring applications. The proposed methodology improved accuracy by 0.16–0.39% by moving the sensor to estimate the distance relative to different locations. Additional power is generated by executing a multi-step measurement while the power self-optimizing process used dynamically adjusts the settings to balance the current of charging and discharging. The battery level can efficiently go over 50% in a stable charging simulation. These methodologies were successfully implemented using an embedded control device; an ultrasonic sensor module; a LORA transmission module; and a stepper motor. According to the experimental results; the proposed multi-step methodology has the benefits of high accuracy and efficient power consumption for water level monitoring applications

A Power-Efficient Multiband Planar USB Dongle Antenna for Wireless Sensor Networks

Wireless Sensor Networks (WSNs) had been applied in Internet of Things (IoT) and in Industry 4.0. Since a WSN system contains multiple wireless sensor nodes, it is necessary to develop a low-power and multiband wireless communication system that satisfies the specifications of the Federal Communications Commission (FCC) and the Certification European (CE). In a WSN system, many devices are of very small size and can be slipped into a Universal Serial Bus (USB), which is capable of connecting to wireless systems and networks, as well as transferring data. These devices are widely known as USB dongles. This paper develops a planar USB dongle antenna for three frequency bands, namely 2.30–2.69 GHz, 3.40–3.70 GHz, and 5.15–5.85 GHz. This study proposes a novel antenna design that uses four loops to develop the multiband USB dongle. The first and second loops construct the low and intermediate frequency ranges. The third loop resonates the high frequency property, while the fourth loop is used to enhance the bandwidth. The performance and power consumption of the proposed multiband planar USB dongle antenna were significantly improved compared to existing multiband designs

Real-time signal detection and classification algorithms for body-centered systems

El principal motivo por el cual los sistemas de comunicación en el entrono corporal se desean con el objetivo de poder obtener y procesar señales biométricas para monitorizar e incluso tratar una condición médica sea ésta causada por una enfermedad o el rendimiento de un atleta. Dado que la base de estos sistemas está en la sensorización y el procesado, los algoritmos de procesado de señal son una parte fundamental de los mismos. Esta tesis se centra en los algoritmos de tratamiento de señales en tiempo real que se utilizan tanto para monitorizar los parámetros como para obtener la información que resulta relevante de las señales obtenidas. En la primera parte se introduce los tipos de señales y sensores en los sistemas en el entrono corporal. A continuación se desarrollan dos aplicaciones concretas de los sistemas en el entorno corporal así como los algoritmos que en las mismas se utilizan. La primera aplicación es el control de glucosa en sangre en pacientes con diabetes. En esta parte se desarrolla un método de detección mediante clasificación de patronones de medidas erróneas obtenidas con el monitor contínuo comercial "Minimed CGMS". La segunda aplicacióin consiste en la monitorizacióni de señales neuronales. Descubrimientos recientes en este campo han demostrado enormes posibilidades terapéuticas (por ejemplo, pacientes con parálisis total que son capaces de comunicarse con el entrono gracias a la monitorizacióin e interpretación de señales provenientes de sus neuronas) y también de entretenimiento. En este trabajo, se han desarrollado algoritmos de detección, clasificación y compresión de impulsos neuronales y dichos algoritmos han sido evaluados junto con técnicas de transmisión inalámbricas que posibiliten una monitorización sin cables. Por último, se dedica un capítulo a la transmisión inalámbrica de señales en los sistemas en el entorno corporal. En esta parte se estudia las condiciones del canal que presenta el entorno corporal para la transmisión de sTraver Sebastiá, L. (2012). Real-time signal detection and classification algorithms for body-centered systems [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/16188Palanci

From data acquisition to data fusion : a comprehensive review and a roadmap for the identification of activities of daily living using mobile devices

This paper focuses on the research on the state of the art for sensor fusion techniques, applied to the sensors embedded in mobile devices, as a means to help identify the mobile device user’s daily activities. Sensor data fusion techniques are used to consolidate the data collected from several sensors, increasing the reliability of the algorithms for the identification of the different activities. However, mobile devices have several constraints, e.g., low memory, low battery life and low processing power, and some data fusion techniques are not suited to this scenario. The main purpose of this paper is to present an overview of the state of the art to identify examples of sensor data fusion techniques that can be applied to the sensors available in mobile devices aiming to identify activities of daily living (ADLs)

Biosensors

A biosensor is defined as a detecting device that combines a transducer with a biologically sensitive and selective component. When a specific target molecule interacts with the biological component, a signal is produced, at transducer level, proportional to the concentration of the substance. Therefore biosensors can measure compounds present in the environment, chemical processes, food and human body at low cost if compared with traditional analytical techniques. This book covers a wide range of aspects and issues related to biosensor technology, bringing together researchers from 11 different countries. The book consists of 16 chapters written by 53 authors. The first four chapters describe several aspects of nanotechnology applied to biosensors. The subsequent section, including three chapters, is devoted to biosensor applications in the fields of drug discovery, diagnostics and bacteria detection. The principles behind optical biosensors and some of their application are discussed in chapters from 8 to 11. The last five chapters treat of microelectronics, interfacing circuits, signal transmission, biotelemetry and algorithms applied to biosensing

Wearable Wireless Devices

No abstract available

A 65nm CMOS lossless bio-signal compression circuit with 250 femtoJoule performance per bit.

A 65nm CMOS integrated circuit implementation of a bio-physiological signal compression device is presented, reporting exceptionally low power, and extremely low silicon area cost, relative to state-of-the-art. A novel `xor-log2-sub-band' data compression scheme is evaluated, achieving modest compression, but with very low resource cost. With the intent to design the `simplest useful compression algorithm', the outcome is demonstrated to be very favourable where power must be saved by trading off compression effort against data storage capacity, or data transmission power, even where more complex algorithms can deliver higher compression ratios. A VLSI design and fabricated Integrated Circuit implementation are presented, and estimated performance gains and efficiency measures for various bio-medical use-cases are given. Power costs as low as 1.2 pJ per sample-bit are suggested for a 10kSa/s data-rate, whilst utilizing a power-gating scenario, and dropping to 250fJ/bit at continuous conversion data-rates of 5MSa/sec. This is achieved with a diminutive circuit area of 155 um2. Both power and area appear to be state-of-the-art in terms of compression versus resource cost, and this yields benefit for system optimization

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumption and high energy efficiency have emerged as the two key criteria for embedded microprocessor design. In this thesis we present a range of microarchitectural low-power design techniques which enable the increase of performance for embedded microprocessors and/or the reduction of energy consumption, e.g., through voltage scaling. In the context of cryptographic applications, we explore the effectiveness of instruction set extensions (ISEs) for a range of different cryptographic hash functions (SHA-3 candidates) on a 16-bit microcontroller architecture (PIC24). Specifically, we demonstrate the effectiveness of light-weight ISEs based on lookup table integration and microcoded instructions using finite state machines for operand and address generation. On-node processing in autonomous wireless sensor node devices requires deeply embedded cores with extremely low power consumption. To address this need, we present TamaRISC, a custom-designed ISA with a corresponding ultra-low-power microarchitecture implementation. The TamaRISC architecture is employed in conjunction with an ISE and standard cell memories to design a sub-threshold capable processor system targeted at compressed sensing applications. We furthermore employ TamaRISC in a hybrid SIMD/MIMD multi-core architecture targeted at moderate to high processing requirements (> 1 MOPS). A range of different microarchitectural techniques for efficient memory organization are presented. Specifically, we introduce a configurable data memory mapping technique for private and shared access, as well as instruction broadcast together with synchronized code execution based on checkpointing. We then study an inherent suboptimality due to the worst-case design principle in synchronous circuits, and introduce the concept of dynamic timing margins. We show that dynamic timing margins exist in microprocessor circuits, and that these margins are to a large extent state-dependent and that they are correlated to the sequences of instruction types which are executed within the processor pipeline. To perform this analysis we propose a circuit/processor characterization flow and tool called dynamic timing analysis. Moreover, this flow is employed in order to devise a high-level instruction set simulation environment for impact-evaluation of timing errors on application performance. The presented approach improves the state of the art significantly in terms of simulation accuracy through the use of statistical fault injection. The dynamic timing margins in microprocessors are then systematically exploited for throughput improvements or energy reductions via our proposed instruction-based dynamic clock adjustment (DCA) technique. To this end, we introduce a 6-stage 32-bit microprocessor with cycle-by-cycle DCA. Besides a comprehensive design flow and simulation environment for evaluation of the DCA approach, we additionally present a silicon prototype of a DCA-enabled OpenRISC microarchitecture fabricated in 28 nm FD-SOI CMOS. The test chip includes a suitable clock generation unit which allows for cycle-by-cycle DCA over a wide range with fine granularity at frequencies exceeding 1 GHz. Measurement results of speedups and power reductions are provided

Low Power IoT based Automated Manhole Cover Monitoring System as a Smart City application

With the increased population in the big cities, Internet of Things (IoT) devices to be used as automated monitoring systems are required in many of the Smart city’s applications. Monitoring road infrastructure such as a manhole cover (MC) is one of these applications. Automating monitoring manhole cover structure has become more demanding, especially when the number of MC failure increases rapidly: it affects the safety, security and the economy of the society. Only 30% of the current MC monitoring systems are automated with short lifetime in comparison to the lifetime of the MC, without monitoring all the MC issues and without discussing the challenges of the design from IoT device design point of view. Extending the lifetime of a fully automated IoT-based MC monitoring system from circuit design point of view was studied and addressed in this research. The main circuit that consumes more power in the IoT-based MC monitoring system is the analogue to digital converter (ADC) found at the data acquisition module (DAQ). In several applications, the compressive sensing (CS) technique proved its capability to reduce the power consumption for ADC. In this research, CS has been investigated and studied deeply to reach the aim of the research. CS based ADC is named analogue to information converter (AIC). Because the heart of the AIC is the pseudorandom number generator (PRNG), several researchers have used it as a key to secure the data, which makes AIC more suitable for IoT device design. Most of these PRNG designs for AIC are hardware implemented in the digital circuit design. The presence of digital PRNG at the AIC analogue front end requires: a) isolating digital and analogue parts, and b) using two different power supplies and grounds for analogue and digital parts. On the other hand, analogue circuit design becomes more demanding for the sake of the power consumption, especially after merging the analogue circuit design with other fields such as neural networks and neuroscience. This has motivated the researcher to propose two low-power analogue chaotic oscillators to replace digital PRNG using opamp Schmitt Trigger. The proposed systems are based on a coupling oscillator concept. The design of the proposed systems is based on: First, two new modifications for the well-known astable multivibrator using opamp Schmitt trigger. Second, the waveshaping design technique is presented to design analogue chaotic oscillators instead of starting with complex differential equations as it is the case for most of the chaotic oscillator designs. This technique helps to find easy steps and understanding of building analogue chaotic oscillators for electronic circuit designers. The proposed systems used off the shelf components as a proof of concept. The proposed systems were validated based on: a) the range of the temperature found beneath a manhole cover, and b) the signal reconstruction under the presence and the absence of noise. The results show decent performance of the proposed system from the power consumption point of view, as it can exceed the lifetime of similar two opamps based Jerk chaotic oscillators by almost one year for long lifetime applications such as monitoring MC using Li-Ion battery. Furthermore, in comparison to PRNG output sequence generated by a software algorithm used in AIC framework in the presence of the noise, the first proposed system output sequence improved the signal reconstruction by 6.94%, while the second system improved the signal reconstruction by 17.83