Study of the modifications needed for effective operation NASTRAN on IBM virtual storage computers

The necessary modifications were determined to make NASTRAN operational under virtual storage operating systems (VS1 and VS2). Suggested changes are presented which will make NASTRAN operate more efficiently under these systems. Estimates of the cost and time involved in design, coding, and implementation of all suggested modifications are included

Performance of VIDEBAS in an operational environment

VIDEBAS is a relational database management system in which a database consists of two parts, namely a “real-only” and an “update” part. The first part remains unmodified until the next reorganization and exploits redundancy to achieve fast access to data. A prototype of VIDEBAS has been built. In this paper a performance comparison between this relational system and a DBTG-system (UDS) is made. The used external memory and the number of page accesses to retrieve and update tuples is estimated. Although it is commonly assumed that in an operational environment relational systems are slower than network systems the opposite appears. On the other hand UDS needs less external memory

NVSwap Latency-Aware Paging Using Non-Volatile Main Memory

Page relocation (paging) from DRAM to swap devices is an important task of a virtual memory system in operating systems. Existing Linux paging mechanisms have two main deficiencies: (1) they may incur a high I/O latency due to write interference on solid-state disks and aggressive memory page reclaiming rate under high memory pressure and (2) they do not provide predictable latency bound for latency-sensitive applications because they cannot control the allocation of system resources among concurrent processes sharing swap devices. In this thesis, we present the design and implementation of a latency-aware paging mechanism called NVSwap. It supports a hybrid swap space using both regular secondary storage devices (e.g., solid-state disks) and non-volatile main memory (NVMM). The design is more cost-effective than using only NVMM as swap spaces. Furthermore, NVSwap uses NVMM as a persistent paging buffer to serve the page-out requests and hide the latency of paging between the regular swap device and DRAM. It supports in-situ paging for pages in the persistent paging buffer avoiding the slow I/O path. Finally, NVSwap allows users to specify latency bounds for individual processes or a group of related processes and enforces the bounds by dynamically controlling the resource allocation of NVMM and page reclaiming rate in memory among scheduling units. We have implemented a prototype of NVSwap in the Linux kernel-3.16.74. Our results demonstrate that NVSwap reduces paging latency by up to 99% and provides performance guarantee and isolation among concurrent applications sharing swap devices

C-MOS array design techniques: SUMC multiprocessor system study

The current capabilities of LSI techniques for speed and reliability, plus the possibilities of assembling large configurations of LSI logic and storage elements, have demanded the study of multiprocessors and multiprocessing techniques, problems, and potentialities. Evaluated are three previous systems studies for a space ultrareliable modular computer multiprocessing system, and a new multiprocessing system is proposed that is flexibly configured with up to four central processors, four 1/0 processors, and 16 main memory units, plus auxiliary memory and peripheral devices. This multiprocessor system features a multilevel interrupt, qualified S/360 compatibility for ground-based generation of programs, virtual memory management of a storage hierarchy through 1/0 processors, and multiport access to multiple and shared memory units