Developing Successful Global Health Alliances

Examines the circumstances that call for alliance formation to reduce the burdens of AIDS, tuberculosis, malaria, polio, river blindness, and many other diseases; the utility of various alliance models; and the characteristics of successful alliances

Fast and Precise Symbolic Analysis of Concurrency Bugs in Device Drivers

© 2015 IEEE.Concurrency errors, such as data races, make device drivers notoriously hard to develop and debug without automated tool support. We present Whoop, a new automated approach that statically analyzes drivers for data races. Whoop is empowered by symbolic pairwise lockset analysis, a novel analysis that can soundly detect all potential races in a driver. Our analysis avoids reasoning about thread interleavings and thus scales well. Exploiting the race-freedom guarantees provided by Whoop, we achieve a sound partial-order reduction that significantly accelerates Corral, an industrial-strength bug-finder for concurrent programs. Using the combination of Whoop and Corral, we analyzed 16 drivers from the Linux 4.0 kernel, achieving 1.5 - 20× speedups over standalone Corral

Towards hardware acceleration of neuroevolution for multimedia processing applications on mobile devices

This paper addresses the problem of accelerating large artificial neural networks (ANN), whose topology and weights can evolve via the use of a genetic algorithm. The proposed digital hardware architecture is capable of processing any evolved network topology, whilst at the same time providing a good trade off between throughput, area and power consumption. The latter is vital for a longer battery life on mobile devices. The architecture uses multiple parallel arithmetic units in each processing element (PE). Memory partitioning and data caching are used to minimise the effects of PE pipeline stalling. A first order minimax polynomial approximation scheme, tuned via a genetic algorithm, is used for the activation function generator. Efficient arithmetic circuitry, which leverages modified Booth recoding, column compressors and carry save adders, is adopted throughout the design

Accelerating innovation development and scaling processes for agricultural transformation

At the 5th Global Science Conference on Climate-Smart Agriculture in Bali, CCAFS, IFAD and USDA-FAS organized the Side event “Accelerating innovation development and scaling climate-smart agriculture to drive a transformation in food systems”. High-level representatives of > 20 governments, research, donor, financial and policy institutions, civil society and private sectors discussed their previously shared insights and agreed to act as an “Insight Group” for further related CCAFS research and action. This Info Note summarizes the groups’ first findings, along with a short proposal for next steps

PULP-HD: Accelerating Brain-Inspired High-Dimensional Computing on a Parallel Ultra-Low Power Platform

Computing with high-dimensional (HD) vectors, also referred to as $\textit{hypervectors}$, is a brain-inspired alternative to computing with scalars. Key properties of HD computing include a well-defined set of arithmetic operations on hypervectors, generality, scalability, robustness, fast learning, and ubiquitous parallel operations. HD computing is about manipulating and comparing large patterns-binary hypervectors with 10,000 dimensions-making its efficient realization on minimalistic ultra-low-power platforms challenging. This paper describes HD computing's acceleration and its optimization of memory accesses and operations on a silicon prototype of the PULPv3 4-core platform (1.5mm$^2$, 2mW), surpassing the state-of-the-art classification accuracy (on average 92.4%) with simultaneous 3.7$\times$ end-to-end speed-up and 2$\times$ energy saving compared to its single-core execution. We further explore the scalability of our accelerator by increasing the number of inputs and classification window on a new generation of the PULP architecture featuring bit-manipulation instruction extensions and larger number of 8 cores. These together enable a near ideal speed-up of 18.4$\times$ compared to the single-core PULPv3

Derated ion thruster design issues

Preliminary activities to develop and refine a lightweight 30 cm engineering model ion thruster are discussed. The approach is to develop a 'derated' ion thruster capable of performing both auxiliary and primary propulsion roles over an input power range of at least 0.5 to 5.0 kilo-W. Design modifications to a baseline thruster to reduce mass and volume are discussed. Performance data over an order of magnitude input power range are presented, with emphasis on the performance impact of engine throttling. Thruster design modifications to optimize performance over specific power envelopes are discussed. Additionally, lifetime estimates based on wear test measurements are made for the operation envelope of the engine