Materials and processes issues in fine pitch eutectic solder flip chip interconnection

New product designs within the electronics packaging industry continue to demand interconnects at shrinking geometry, both at the integrated circuit and supporting circuit board substrate level, thereby creating numerous manufacturing challenges. Flip chip on board (FCOB) applications are currently being driven by the need for reduced manufacturing costs and higher volume robust production capability. One of today’s low cost FCOB solutions has emerged as an extension of the existing infrastructure for surface mount technology and combines an under bump metallization (UBM) with a stencil printing solder bumping process, to generate mechanically robust joint structures with low electrical resistance between chip and board. Although electroless Ni plating of the UBM, and stencil printing for solder paste deposition have been widely used in commercial industrial applications, there still exists a number of technical issues related to these materials and processes as the joint geometry is further reduced. This paper reports on trials with electroless Ni plating and stencil paste printing and the correlation between process variables in the formation of bumps and the shear strength of said bumps at different geometries. The effect of precise control of tolerances in squeegees, stencils and wafer fixtures was examined to enable the optimization of the materials, processes, and tooling for reduction of bumping defects

Materials and processes issues in fine pitch eutectic solder flip chip interconnection

New product designs within the electronics packaging industry continue to demand interconnects at microscopic geometry, both at the Integrated Circuit (IC) and supporting board level, thereby creating numerous manufacturing challenges. Flip Chip On Board (FCOB) applications are currently being driven by competitive manufacturing costs and the need for higher volume and robust production capabilities. One of today’s low cost FCOB solutions has emerged as an extension of the existing infrastructure for Surface Mount Technology (SMT) and combines an Under Bump Metallisation (UBM) with a stencil printing solder bumping process, to generate mechanically robust joint structures with low electrical resistance between chip and board. Although electroless Ni plating of the UBM, and stencil printing for solder paste deposition, have been widely used in commercial industrial applications, there still exists a number of technical issues related to these materials and processes as the joint geometry is further reduced. This paper reports on trials with electroless Ni plating and stencil paste printing and the correlation between process variables in the formation of bumps and the shear strength of such bumps at different geometries. The effect of precise control of the tolerances of squeegees, stencils and wafer fixtures was examined to enable the optimisation of the materials, processes and tooling for reduction of bumping defects

Properties and behaviour of Pb-free solders in flip-chip scale solder interconnections

Due to pending legislations and market pressure, lead-free solders will replace Sn–Pb solders in 2006. Among the lead-free solders being studied, eutectic Sn–Ag, Sn–Cu and Sn–Ag–Cu are promising candidates and Sn–3.8Ag–0.7Cu could be the most appropriate replacement due to its overall balance of properties. In order to garner more understanding of lead-free solders and their application in flip-chip scale packages, the properties of lead free solders, including the wettability, intermetallic compound (IMC) growth and distribution, mechanical properties, reliability and corrosion resistance, were studied and are presented in this thesis. [Continues.

Electroless nickel bumping of aluminium bondpads. Part 1 - surface pre-treatment and activation

Electroless nickel bumping of aluminum (Al) bondpads followed by solder paste printing is seen as one of the lowest cost routes for the bumping of wafers prior to flip-chip assembly. However, the electroless nickel bumping of Al bondpads is not straightforward and a number of activation steps are necessary to enable the nickel deposit to form a strong, electrically conductive bond with the Al. For the electroless nickel coating of mechanical components made of aluminum, a zincate activation process has been used for many years, however extension of these techniques to semiconductor wafers requires careful control over these pretreatments to avoid damage to the very thin bondpads. This paper reports a number of experiments designed to characterize the activation of Al bondpads to electroless nickel plating, focusing on the effects of solution exposure time and bondpad composition. In addition, the results are discussed in the context of other studies presented in the literature to provide an understanding of the mechanism of the zincate activation process applied to Al bondpads

Numerical analysis of lead-free solder joints: effects of thermal cycling and electromigration

To meet the requirements of miniaturization and multifunction in microelectronics, understanding of their reliability and performance has become an important research subject in order to characterise electronics served under various loadings. Along with the demands of the increasing miniaturization of electronic devices, various properties and the relevant thermo-mechanical-electrical response of the lead-free solder joints to thermal cycling and electro-migration become the critical factors, which affect the service life of microelectronics in different applications. However, due to the size and structure of solder interconnects in microelectronics, traditional methods based on experiments are not applicable in the evaluation of their reliability under complex joint loadings. This thesis presents an investigation, which is based on finite-element method, into the performance of lead-free solder interconnects under thermal fatigue and electro-migration, specifically in the areas as follows: (1) the investigation of thermal-mechanical performance and fatigue-life prediction of flip-chip package under different sizes to achieve a further understanding of IMC layer and size effects of a flip chip package under thermal cycling; (2) the establishment of a numerical method, simulating void-formation/crack-propagation based on the results of finite-element analysis, to allow the prediction of crack evolution and failure time for electro-migration reliability of solder bumps; (3) the establishment of a flow-based algorithm for combination effects of thermal-mechanical and electro-migration that was subsequent implemented in to an FE model to evaluate the reliability assessment of service lives associated with a flip chip package

Study of intermetallic compound layer formation, growth and evaluation of shear strength of lead-free solder joints

Solder joints play a very important role in electronic products as the integrity of electronics packaging and assembly rests on the quality of these connections. The increasing demands for higher performance, lower cost, and miniaturisation in hand-held and consumer electronic products have led to the use of dense interconnections. This miniaturization trend means that solder joint reliability remains an important challenge with surface mount electronics assembly, especially those used in hostile environments, and applications such as automobile, aerospace and other safety critical operations. One of the most important factors which are known to affect solder joint reliability is the thickness of intermetallic compound (IMC) layer formed between the solder and the substrate. Although the formation of an IMC layer signifies good bonding between the solder and substrate, its main disadvantage is that it is also known to be the most brittle part of the solder joint. Thus as the miniaturisation trend continues, and solder joints become even smaller in size, the nature and impact of IMC layer thickness on solder joint reliability becomes even more of a concern with the introduction of new lead-free soldering. Other factors which are known to affect solder joint reliability include the bonding strength, the voiding percentage in joints, the size of the voids and their location within the joint. The work reported in this thesis on formation and growth of intermetallic compound layer, and evaluation of the shear strength of lead-free solder joints is divided into four main parts. The first part of the study is concerned with understanding of the effect of pad sizes on Inter-metallic compound layer formation and growth for lead-free solder joints. The second part concerns the study of the effect of temperature cycling and reflow profiles on intermetallic growth between Sn-Ag-Cu alloy and Cu substrate. The third part of the study concerns the investigation of the effect of reflow soldering profile optimization on solder volumes using design of experiment technique. The focus of the final part of the study is the investigation of the effect of Inter-metallic Compound thickness on shear strength of 1206 surface mount chip resistor. The results from the experimental work showed that the pad size has very little influence on the growth of the IMC. The result also shows that the growth of IMC depends on diffusion rate, temperature and time according to the power-law model; and that the IMC layer thickness is independent of pad size. The significance of this result is that with further reductions in joint size (with IMC layer thickness remaining the same), the ratio of the IMC layer thickness to solder joint size will increase and adversely impact the joint reliability. The work carried out on ageing temperatures and reflow profiles of Sn-Ag-Cu alloy and Cu substrate also showed the reaction-diffusion mechanism of intermetallic compound formation and growth in solder joints. The study also showed that the most significant factor in achieving lower IMC layer thickness and fine microstructures is the time to peak temperature of the reflow soldering process. The effect of IMC layer thickness on the shear strength of Sn-Ag-Cu solder joints was investigated. The relationship of shear strength, interfacial microstructures and fracture surfaces was considered. It is clear that formation of continuous Cu-Sn and SnNiCu layers are the reason for the weak interface strength. The results show that the shear strength of solder joints decreases with increasing ageing time. The results of this study have been disseminated through journal and conference publications and will be of interest to R&D personnel working in the area of high temperature electronics and in particular those working in the field of automotive electronics

MICROSTRUCTURAL CHARACTERIZATION AND THERMAL CYCLING RELIABILITY OF SOLDERS UNDER ISOTHERMAL AGING AND ELECTRICAL CURRENT

Solder joints on printed circuit boards provide electrical and mechanical connections between electronic devices and metallized patterns on boards. These solder joints are often the cause of failure in electronic packages. Solders age under storage and operational life conditions, which can include temperature, mechanical loads, and electrical current. Aging occurring at a constant temperature is called isothermal aging. Isothermal aging leads to coarsening of the bulk microstructure and increased interfacial intermetallic compounds at the solder-pad interface. The coarsening of the solder bulk degrades the creep properties of solders, whereas the voiding and brittleness of interfacial intermetallic compounds leads to mechanical weakness of the solder joint. Industry guidelines on solder interconnect reliability test methods recommend preconditioning the solder assemblies by isothermal aging before conducting reliability tests. The guidelines assume that isothermal aging simulates a "reasonable use period," but do not relate the isothermal aging levels with specific use conditions. Studies on the effect of isothermal aging on the thermal cycling reliability of tin-lead and tin-silver-copper solders are limited in scope, and results have been contradictory. The effect of electrical current on solder joints has been has mostly focused on current densities above 104A/cm2 with high ambient temperature (≥100oC), where electromigration, thermomigration, and Joule heating are the dominant failure mechanisms. The effect of current density below 104A/cm2 on temperature cycling fatigue of solders has not been established. This research provides the relation between isothermal aging and the thermal cycling reliability of select Sn-based solders. The Sn-based solders with 3%, 1%, and 0% silver content that have replaced tin-lead are studied and compared against tin-lead solder. The activation energy and growth exponents of the Arrhenius model for the intermetallic growth in the solders are provided. An aging metric to quantify the aging of solder joints, in terms of phase size in the solder bulk and interfacial intermetallic compound thickness at the solder-pad interface, is established. Based on the findings of thermal cycling tests on aged solder assemblies, recommendations are made for isothermal aging of solders before thermal cycling tests. Additionally, the effect of active electrical current at 103 A/cm2 on thermal cycling reliability is reported

Effect Of Pad Roughness On Shear Strength Of Thin Small Leadless Package

Thin Small Leadless Packages (TSLP) have been manufactured to cater the current industry demand for a smaller electronic apparatus with a higher electrical performance. Previous studies showed the solder joint strength of leadless package with the printed circuit board (PCB) using Ni-P/Sn-0.5 Ag solder were influenced by soldering and reflow parameters. Nevertheless, scattered studies have been reported on the effect of surface roughness (Ra) of leadless package on its solder joint strength. The current study investigated effect of Ra of TSLP on the solder joint strength between the TSLP and PCB. In the current study, Ra of package’s contact pad were varied using different Cu alloy leadframe materials (i.e. C194 and EFTECH-64) and etching process parameters (i.e. pH, specific Cu density and conveyor speed). This study also investigated the effect of Ni-P plating thickness and solder reflow conditions (i.e. temperature and duration) on the solder joint strength. Shear test was conducted on the soldered samples using Dage Series 4000 Bond Tester as per Infineon’s Control Plan Specifications, with the shear strength data represented the solder strength values. Subsequently, the discussion of solder strength results were supported by the failure mode results of the shear test samples, generated by scanning electron microscopy (SEM, JOEL JSM-6360A) images and energy dispersive Xray (EDX, JOEL JSM-6360A) analysis. An increase of Ni-P thickness on the etched samples reduced their Ra, thus resulted in a higher solder joint strength and smaller strength variation. Porous solder region in the soldered samples contributed to Mode 1 failure (i.e. fracture at solder region), which were exhibited by more than 80% of shear test samples. Only small percentages of shear samples showed Mode 2 (i.e. fracture at IMC and Ni-P layer interface) and Mode 3 (i.e. fracture at Ni-P and Ni bump interface). The percentage of Mode 2 and 3 failures were lower (i.e. composed of less than 5% of shear test samples) in low Ra samples. This could be explained by the improved solder wettability and strengthening of the IMC layer on the low Ra Ni-P plated samples

ELECTRICAL AND MECHANICAL CHARACTERIZATION OF MWNT FILLED CONDUCTIVE ADHESIVE FOR ELECTRONICS PACKAGING

Lead-tin solder has been widely used as interconnection material in electronics packaging for a long time. In response to environmental legislation, the lead-tin alloys are being replaced with lead-free alloys and electrically conductive adhesives in consumer electronics. Lead-free solder usually require higher reflow temperatures than the traditional lead-tin alloys, which can cause die crack and board warpage in assembly process, thereby impacting the assembly yields. The high tin content in lead-free solder forms tin whiskers, which has the potential to cause short circuits failure. Conductive adhesives are an alternative to solder reflow processing, however, conductive adhesives require up to 80 wt% metal filler to ensure electrical and thermal conductivity. The high loading content degrades the mechanical properties of the polymer matrix and reduces the reliability and assembly yields when compared to soldered assemblies. Carbon nanotubes (CNTs) have ultra high aspect ratio as well as many novel properties. The high aspect ratio of CNTs makes them easy to form percolation at low loading and together with other novel properties make it possible to provide electrical and thermal conductivity for the polymer matrix while maintaining or even reinforcing the mechanical properties. Replacing the metal particles with CNTs in conductive adhesive compositions has the potential benefits of being lead free, low process temperature, corrosion resistant, electrically/thermally conductive, high mechanical strength and lightweight. In this paper, multiwall nanotubes (MWNTs) with different dimensions are mixed with epoxy. The relationships among MWNTs dimension, volume resistivity and thermal conductivity of the composite are characterized. Different loadings of CNTs, additives and mixing methods were used to achieve satisfying electrical and mechanical properties and pot life. Different assembly technologies such as pressure dispensing, screen and stencil printing are used to simplify the processing method and raise the assembly yields. Contact resistance, volume resistivity, high frequency performance, thermal conductivity and mechanical properties were measured and compared with metal filled conductive adhesive and traditional solder paste

Novel fine pitch interconnection methods using metallised polymer spheres

There is an ongoing demand for electronics devices with more functionality while reducing size and cost, for example smart phones and tablet personal computers. This requirement has led to significantly higher integrated circuit input/output densities and therefore the need for off-chip interconnection pitch reduction. Flip-chip processes utilising anisotropic conductive adhesives anisotropic conductive films (ACAs/ACFs) have been successfully applied in liquid crystal display (LCD) interconnection for more than two decades. However the conflict between the need for a high particle density, to ensure sufficient the conductivity, without increasing the probability of short circuits has remained an issue since the initial utilization of ACAs/ACFs for interconnection. But this issue has become even more severe with the challenge of ultra-fine pitch interconnection. This thesis advances a potential solution to this challenge where the conductive particles typically used in ACAs are selectively deposited onto the connections ensuring conductivity without bridging. The research presented in this thesis work has been undertaken to advance the fundamental understanding of the mechanical characteristics of micro-sized metal coated polymer particles (MCPs) and their application in fine or ultra-fine pitch interconnections. This included use of a new technique based on an in-situ nanomechanical system within SEM which was utilised to study MCP fracture and failure when undergoing deformation. Different loading conditions were applied to both uncoated polymer particles and MCPs, and the in-situ system enables their observation throughout compression. The results showed that both the polymer particles and MCP display viscoelastic characteristics with clear strain-rate hardening behaviour, and that the rate of compression therefore influences the initiation of cracks and their propagation direction. Selective particle deposition using electrophoretic deposition (EPD) and magnetic deposition (MD) of Ni/Au-MCPs have been evaluated and a fine or ultra-fine pitch deposition has been demonstrated, followed by a subsequent assembly process. The MCPs were successfully positively charged using metal cations and this charging mechanism was analysed. A new theory has been proposed to explain the assembly mechanism of EPD of Ni/Au coated particles using this metal cation based charging method. The magnetic deposition experiments showed that sufficient magnetostatic interaction force between the magnetized particles and pads enables a highly selective dense deposition of particles. Successful bonding to form conductive interconnections with pre-deposited particles have been demonstrated using a thermocompression flip-chip bonder, which illustrates the applicable capability of EPD of MCPs for fine or ultra-fine pitch interconnection