A critical analysis of research potential, challenges and future directives in industrial wireless sensor networks

In recent years, Industrial Wireless Sensor Networks (IWSNs) have emerged as an important research theme with applications spanning a wide range of industries including automation, monitoring, process control, feedback systems and automotive. Wide scope of IWSNs applications ranging from small production units, large oil and gas industries to nuclear fission control, enables a fast-paced research in this field. Though IWSNs offer advantages of low cost, flexibility, scalability, self-healing, easy deployment and reformation, yet they pose certain limitations on available potential and introduce challenges on multiple fronts due to their susceptibility to highly complex and uncertain industrial environments. In this paper a detailed discussion on design objectives, challenges and solutions, for IWSNs, are presented. A careful evaluation of industrial systems, deadlines and possible hazards in industrial atmosphere are discussed. The paper also presents a thorough review of the existing standards and industrial protocols and gives a critical evaluation of potential of these standards and protocols along with a detailed discussion on available hardware platforms, specific industrial energy harvesting techniques and their capabilities. The paper lists main service providers for IWSNs solutions and gives insight of future trends and research gaps in the field of IWSNs

Physical parameter-aware Networks-on-Chip design

PhD ThesisNetworks-on-Chip (NoCs) have been proposed as a scalable, reliable and power-efficient communication fabric for chip multiprocessors (CMPs) and multiprocessor systems-on-chip (MPSoCs). NoCs determine both the performance and the reliability of such systems, with a significant power demand that is expected to increase due to developments in both technology and architecture. In terms of architecture, an important trend in many-core systems architecture is to increase the number of cores on a chip while reducing their individual complexity. This trend increases communication power relative to computation power. Moreover, technology-wise, power-hungry wires are dominating logic as power consumers as technology scales down. For these reasons, the design of future very large scale integration (VLSI) systems is moving from being computation-centric to communication-centric. On the other hand, chip’s physical parameters integrity, especially power and thermal integrity, is crucial for reliable VLSI systems. However, guaranteeing this integrity is becoming increasingly difficult with the higher scale of integration due to increased power density and operating frequencies that result in continuously increasing temperature and voltage drops in the chip. This is a challenge that may prevent further shrinking of devices. Thus, tackling the challenge of power and thermal integrity of future many-core systems at only one level of abstraction, the chip and package design for example, is no longer sufficient to ensure the integrity of physical parameters. New designtime and run-time strategies may need to work together at different levels of abstraction, such as package, application, network, to provide the required physical parameter integrity for these large systems. This necessitates strategies that work at the level of the on-chip network with its rising power budget. This thesis proposes models, techniques and architectures to improve power and thermal integrity of Network-on-Chip (NoC)-based many-core systems. The thesis is composed of two major parts: i) minimization and modelling of power supply variations to improve power integrity; and ii) dynamic thermal adaptation to improve thermal integrity. This thesis makes four major contributions. The first is a computational model of on-chip power supply variations in NoCs. The proposed model embeds a power delivery model, an NoC activity simulator and a power model. The model is verified with SPICE simulation and employed to analyse power supply variations in synthetic and real NoC workloads. Novel observations regarding power supply noise correlation with different traffic patterns and routing algorithms are found. The second is a new application mapping strategy aiming vii to minimize power supply noise in NoCs. This is achieved by defining a new metric, switching activity density, and employing a force-based objective function that results in minimizing switching density. Significant reductions in power supply noise (PSN) are achieved with a low energy penalty. This reduction in PSN also results in a better link timing accuracy. The third contribution is a new dynamic thermal-adaptive routing strategy to effectively diffuse heat from the NoC-based threedimensional (3D) CMPs, using a dynamic programming (DP)-based distributed control architecture. Moreover, a new approach for efficient extension of two-dimensional (2D) partially-adaptive routing algorithms to 3D is presented. This approach improves three-dimensional networkon- chip (3D NoC) routing adaptivity while ensuring deadlock-freeness. Finally, the proposed thermal-adaptive routing is implemented in field-programmable gate array (FPGA), and implementation challenges, for both thermal sensing and the dynamic control architecture are addressed. The proposed routing implementation is evaluated in terms of both functionality and performance. The methodologies and architectures proposed in this thesis open a new direction for improving the power and thermal integrity of future NoC-based 2D and 3D many-core architectures

Aging-Aware Routing Algorithms for Network-on-Chips

Network-on-Chip (NoC) architectures have emerged as a better replacement of the traditional bus-based communication in the many-core era. However, continuous technology scaling has made aging mechanisms, such as Negative Bias Temperature Instability (NBTI) and electromigration, primary concerns in NoC design. In this work, a novel system-level aging model is proposed to model the effects of aging in NoCs, caused due to (a) asymmetric communication patterns between the network nodes, and (b) runtime traffic variations due to routing policies. This work observes a critical need of a holistic aging analysis, which when combined with power-performance optimization, poses a multi-objective design challenge. To solve this problem, two different aging-aware routing algorithms are proposed: (a) congestion-oblivious Mixed Integer Linear Programming (MILP)-based routing algorithm, and (b) congestion-aware adaptive routing algorithm and router micro-architecture. After extensive experimental evaluations, proposed routing algorithms reduce aging-induced power-performance overheads while also improving the system robustness

AI/ML Algorithms and Applications in VLSI Design and Technology

An evident challenge ahead for the integrated circuit (IC) industry in the nanometer regime is the investigation and development of methods that can reduce the design complexity ensuing from growing process variations and curtail the turnaround time of chip manufacturing. Conventional methodologies employed for such tasks are largely manual; thus, time-consuming and resource-intensive. In contrast, the unique learning strategies of artificial intelligence (AI) provide numerous exciting automated approaches for handling complex and data-intensive tasks in very-large-scale integration (VLSI) design and testing. Employing AI and machine learning (ML) algorithms in VLSI design and manufacturing reduces the time and effort for understanding and processing the data within and across different abstraction levels via automated learning algorithms. It, in turn, improves the IC yield and reduces the manufacturing turnaround time. This paper thoroughly reviews the AI/ML automated approaches introduced in the past towards VLSI design and manufacturing. Moreover, we discuss the scope of AI/ML applications in the future at various abstraction levels to revolutionize the field of VLSI design, aiming for high-speed, highly intelligent, and efficient implementations

Design Space Exploration and Resource Management of Multi/Many-Core Systems

The increasing demand of processing a higher number of applications and related data on computing platforms has resulted in reliance on multi-/many-core chips as they facilitate parallel processing. However, there is a desire for these platforms to be energy-efficient and reliable, and they need to perform secure computations for the interest of the whole community. This book provides perspectives on the aforementioned aspects from leading researchers in terms of state-of-the-art contributions and upcoming trends

Energy aware optimization for low power radio technologies

The explosive growth of IoT is pushing the market towards cheap, very low power devices with a strong focus on miniaturization, for applications such as in-body sensors, personal health monitoring and microrobots. Proposing procedures for energy efficiency in IoT is a difficult task, as it is a rapidly growing market comprised of many and very diverse product categories using technologies that are not stable, evolving at a high pace. The research in this field proposes solutions that go from physical layer optimization up to the network layer, and the sensor network designer has to select the techniques that are best for its application specific architecture and radio technology used. This work is focused on exploring new techniques for enhancing the energy efficiency and user experience of IoT networks. We divide the proposed techniques in frame and chip level optimization techniques, respectively. While the frame level techniques are meant to improve the performance of existing radio technologies, the chip level techniques aim at replacing them with crystal-free architectures. The identified frame level techniques are the use of preamble authentication and packet fragmentation, advisable for Low Power Wide Area Networks (LPWANs), a technology that offers the lowest energy consumption per provided service, but is vulnerable in front of energy exhaustion attacks and does not perform well in dense networks. The use of authenticated preambles between the sensors and gateways becomes a defence mechanism against the battery draining intended by attackers. We show experimentally that this approach is able to reduce with 91% the effect of an exhaustion attack, increasing the device's lifetime from less than 0.24 years to 2.6 years. The experiments were conducted using Loadsensing sensor nodes, commercially used for critical infrastructure control and monitoring. Even if exemplified on LoRaWAN, the use of preamble authentication is extensible to any wireless protocol. The use of packet fragmentation despite the packet fits the frame, is shown to reduce the probability of collisions while the number of users in the duty-cycle restricted network increases. Using custom-made Matlab simulations, important goodput improvement was obtained with fragmentation, with higher impact in slower and denser networks. Using NS3 simulations, we showed that combining packet fragmentation with group NACK can increase the network reliability, while reducing the energy consumed for retransmissions, at the cost of adding small headers to each fragment. It is a strategy that proves to be effective in dense duty-cycle restricted networks only, where the headers overhead is negligible compared to the network traffic. As a chip level technique, we consider using radios for communication that do not use external frequency references such as crystal oscillators. This would enable having all sensor's elements on a single piece of silicon, rendering it even ten times more energy efficient due to the compactness of the chip. The immediate consequence is the loss of communication accuracy and ability to easily switch communication channels. In this sense, we propose a sequence of frequency synchronization algorithms and phases that have to be respected by a crystal-free device so that it can be able to join a network by finding the beacon channel, synthesize all communication channels and then maintain their accuracy against temperature change. The proposed algorithms need no additional network overhead, as they are using the existing network signaling. The evaluation is made in simulations and experimentally on a prototype implementation of an IEEE802.15.4 crystal-free radio. While in simulations we are able to change to another communication channel with very good frequency accuracy, the results obtained experimentally show an initial accuracy slightly above 40ppm, which will be later corrected by the chip to be below 40 ppm.El crecimiento significativo de la IoT está empujando al mercado hacia el desarrollo de dispositivos de bajo coste, de muy bajo consumo energético y con un fuerte enfoque en la miniaturización, para aplicaciones que requieran sensores corporales, monitoreo de salud personal y micro-robots. La investigación en el campo de la eficiencia energética en la IoT propone soluciones que van desde la optimización de la capa física hasta la capa de red. Este trabajo se centra en explorar nuevas técnicas para mejorar la eficiencia energética y la experiencia del usuario de las redes IoT. Dividimos las técnicas propuestas en técnicas de optimización de nivel de trama de red y chip, respectivamente. Si bien las técnicas de nivel de trama están destinadas a mejorar el rendimiento de las tecnologías de radio existentes, las técnicas de nivel de chip tienen como objetivo reemplazarlas por arquitecturas que no requieren de cristales. Las técnicas de nivel de trama desarrolladas en este trabajo son el uso de autenticación de preámbulos y fragmentación de paquetes, aconsejables para redes LPWAN, una tecnología que ofrece un menor consumo de energía por servicio prestado, pero es vulnerable frente a los ataques de agotamiento de energía y no escalan frente la densificación. El uso de preámbulos autenticados entre los sensores y las pasarelas de enlace se convierte en un mecanismo de defensa contra el agotamiento del batería previsto por los atacantes. Demostramos experimentalmente que este enfoque puede reducir con un 91% el efecto de un ataque de agotamiento, aumentando la vida útil del dispositivo de menos de 0.24 años a 2.6 años. Los experimentos se llevaron a cabo utilizando nodos sensores de detección de carga, utilizados comercialmente para el control y monitoreo de infrastructura crítica. Aunque la técnica se ejemplifica en el estándar LoRaWAN, el uso de autenticación de preámbulo es extensible a cualquier protocolo inalámbrico. En esta tesis se muestra también que el uso de la fragmentación de paquetes a pesar de que el paquete se ajuste a la trama, reduce la probabilidad de colisiones mientras aumenta el número de usuarios en una red con restricciones de ciclos de transmisión. Mediante el uso de simulaciones en Matlab, se obtiene una mejora importante en el rendimiento de la red con la fragmentación, con un mayor impacto en redes más lentas y densas. Usando simulaciones NS3, demostramos que combinar la fragmentación de paquetes con el NACK en grupo se puede aumentar la confiabilidad de la red, al tiempo que se reduce la energía consumida para las retransmisiones, a costa de agregar pequeños encabezados a cada fragmento. Como técnica de nivel de chip, consideramos el uso de radios para la comunicación que no usan referencias de frecuencia externas como los osciladores basados en un cristal. Esto permitiría tener todos los elementos del sensor en una sola pieza de silicio, lo que lo hace incluso diez veces más eficiente energéticamente debido a la integración del chip. La consecuencia inmediata, en el uso de osciladores digitales en vez de cristales, es la pérdida de precisión de la comunicación y la capacidad de cambiar fácilmente los canales de comunicación. En este sentido, proponemos una secuencia de algoritmos y fases de sincronización de frecuencia que deben ser respetados por un dispositivo sin cristales para que pueda unirse a una red al encontrar el canal de baliza, sintetizar todos los canales de comunicación y luego mantener su precisión contra el cambio de temperatura. Los algoritmos propuestos no necesitan una sobrecarga de red adicional, ya que están utilizando la señalización de red existente. La evaluación se realiza en simulaciones y experimentalmente en una implementación prototipo de una radio sin cristal IEEE802.15.4. Los resultados obtenidos experimentalmente muestran una precisión inicial ligeramente superior a 40 ppm, que luego será corregida por el chip para que sea inferior a 40 ppm.Postprint (published version

Routing Protocols in Wireless Sensor Networks

The applications of wireless sensor networks comprise a wide variety of scenarios. In most of them, the network is composed of a significant number of nodes deployed in an extensive area in which not all nodes are directly connected. Then, the data exchange is supported by multihop communications. Routing protocols are in charge of discovering and maintaining the routes in the network. However, the appropriateness of a particular routing protocol mainly depends on the capabilities of the nodes and on the application requirements. This paper presents a review of the main routing protocols proposed for wireless sensor networks. Additionally, the paper includes the efforts carried out by Spanish universities on developing optimization techniques in the area of routing protocols for wireless sensor networks