46 research outputs found

    Addressing On-Chip Power Conversion and Dissipation Issues in Many-Core System-on-a-Chip based on Conventional Silicon and Emerging Nanotechnologies

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    Title from PDF of title page viewed August 27, 2018Dissertation advisor: Masud H ChowdhuryVitaIncludes bibliographical references (pages 158-163)Thesis (Ph.D.)--School of Computing and Engineering and Department of Physics and Astronomy. University of Missouri--Kansas City, 2017Integrated circuits (ICs) are moving towards system-on-a-chip (SOC) designs. SOC allows various small and large electronic systems to be implemented in a single chip. This approach enables the miniaturization of design blocks that leads to high density transistor integration, faster response time, and lower fabrication costs. To reap the benefits of SOC and uphold the miniaturization of transistors, innovative power delivery and power dissipation management schemes are paramount. This dissertation focuses on on-chip integration of power delivery systems and managing power dissipation to increase the lifetime of energy storage elements. We explore this problem from two different angels: On-chip voltage regulators and power gating techniques. On-chip voltage regulators reduce parasitic effects, and allow faster and efficient power delivery for microprocessors. Power gating techniques, on the other hand, reduce the power loss incurred by circuit blocks during standby mode. Power dissipation (Ptotal = Pstatic and Pdynamic) in a complementary metal-oxide semiconductor (CMOS) circuit comes from two sources: static and dynamic. A quadratic dependency on the dynamic switching power and a more than linear dependency on static power as a form of gate leakage (subthreshold current) exist. To reduce dynamic power loss, the supply power should be reduced. A significant reduction in power dissipation occurs when portions of a microprocessor operate at a lower voltage level. This reduction in supply voltage is achieved via voltage regulators or converters. Voltage regulators are used to provide a stable power supply to the microprocessor. The conventional off-chip switching voltage regulator contains a passive floating inductor, which is difficult to be implemented inside the chip due to excessive power dissipation and parasitic effects. Additionally, the inductor takes a very large chip area while hampering the scaling process. These limitations make passive inductor based on-chip regulator design very unattractive for SOC integration and multi-/many-core environments. To circumvent the challenges, three alternative techniques based on active circuit elements to replace the passive LC filter of the buck convertor are developed. The first inductorless on-chip switching voltage regulator architecture is based on a cascaded 2nd order multiple feedback (MFB) low-pass filter (LPF). This design has the ability to modulate to multiple voltage settings via pulse with modulation (PWM). The second approach is a supplementary design utilizing a hybrid low drop-out scheme to lower the output ripple of the switching regulator over a wider frequency range. The third design approach allows the integration of an entire power management system within a single chipset by combining a highly efficient switching regulator with an intermittently efficient linear regulator (area efficient), for robust and highly efficient on-chip regulation. The static power (Pstatic) or subthreshold leakage power (Pleak) increases with technology scaling. To mitigate static power dissipation, power gating techniques are implemented. Power gating is one of the popular methods to manage leakage power during standby periods in low-power high-speed IC design. It works by using transistor based switches to shut down part of the circuit block and put them in the idle mode. The efficiency of a power gating scheme involves minimum Ioff and high Ion for the sleep transistor. A conventional sleep transistor circuit design requires an additional header, footer, or both switches to turn off the logic block. This additional transistor causes signal delay and increases the chip area. We propose two innovative designs for next generation sleep transistor designs. For an above threshold operation, we present a sleep transistor design based on fully depleted silicon-on-insulator (FDSOI) device. For a subthreshold circuit operation, we implement a sleep transistor utilizing the newly developed silicon-on ferroelectric-insulator field effect transistor (SOFFET). In both of the designs, the ability to control the threshold voltage via bias voltage at the back gate makes both devices more flexible for sleep transistors design than a bulk MOSFET. The proposed approaches simplify the design complexity, reduce the chip area, eliminate the voltage drop by sleep transistor, and improve power dissipation. In addition, the design provides a dynamically controlled Vt for times when the circuit needs to be in a sleep or switching mode.Introduction -- Background and literature review -- Fully integrated on-chip switching voltage regulator -- Hybrid LDO voltage regulator based on cascaded second order multiple feedback loop -- Single and dual output two-stage on-chip power management system -- Sleep transistor design using double-gate FDSOI -- Subthreshold region sleep transistor design -- Conclusio

    Low-Cost Ratiometric Fluorescence Sensors for Accurate Detection of pH Value

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    Fluorometric sensing is a major optical measurement approach widely used in chemical, biological, and medical fields. In conventional fluorescence measurements, two approaches have been used to build low-cost fluorescence sensors. The first approach is to use CCD detector arrays, which incur low sensitivity. The second approach is to use a narrow bandpass filter, which incur low selectivity. In this thesis, a low-cost ratiometric fluorescence sensor was developed to achieve high sensitivity and high selectivity simultaneously. Two highly sensitive photodetectors were used to monitor fluorescence signal excited by two ultraviolet LEDs with different emitting wavelengths to achieve the sensitivity close to single photon counting. The ratio of fluorescence signals excited by two LEDs was used to identify targeted species with improved selectivity. This thesis describe the design, development, implementation of optical components, mechanic housing, digital and analog circuits that enable the ratiometric fluorescence measurements. The applications and functionalities of the sensor was demonstrated to measure pH values in liquid solution. The low-cost sensing systems can be programmed in stand-alone operation or be controlled by a laptop or a cellular devices for a wide spread applications including water quality monitoring, biological sensing, and chemical processing monitoring

    An electrical power system for CubeSats

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    The advent of CubeSats has provided a platform for relatively low-budget programmes to realise space missions. In South Africa, Stellenbosch University and the Cape Peninsula University of Technology have impressive space programmes and have been involved in numerous successful satellite launches. A number of CubeSat projects are currently in progress and commercial-grade Attitude Determination and Control Systems (ADCS), and communications modules, are being developed by the respective universities. The development of a CubeSat-compatible Electrical Power System remains absent, and would be beneficial to future satellite activity here in South Africa. In this thesis, some fundamental aspects of electronic design for space applications is looked at, including but not limited to radiation effects on MOSFET devices; this poses one of the greatest challenges to space-based power systems. To this extent, the different radiation-induced effects and their implications are looked at, and mitigation strategies are discussed. A review of current commercial modules is performed and their design and performance evaluated. A few shortcomings of current systems are noted and corresponding design changes are suggested; in some instances these changes add complexity, but they are shown to introduce appreciable system reliability. A single Li-Ion cell configuration is proposed that uses a 3.7 V nominal bus voltage. Individual battery charge regulation introduces minor inefficiencies, but allows isolation of cells from the pack in the case of cell failure or degradation. A further advantage is the possibility for multiple energy storage media on the same power bus, allowing for EPS-related technology demonstrations, with an assurance of minimum system capabilities. The design of each subsystem is discussed and its respective failure modes identified. A limited number of single points of failure are noted and the mitigation strategies taken are discussed. An initial hardware prototype is developed that is used to test and characterise system performance. Although a few minor modifications are needed, the overall system is shown to function as designed and the concepts used are proven

    Planar Ion Probe for Low-Latitude Ionosphere/Thermosphere Enhancements in Density Cubesat Mission

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    One of the crucial measurements for characterizing any space weather event is absolute plasma density and plasma density fluctuations, both spatially and temporally. Langmuir probes are the oldest and most proven instruments for these in-situ measurements. This thesis enumerates the development of a miniaturized low-noise Langmuir probe intended for a dual CubeSat mission to study equatorial temperature and wind anomaly in the Earth’s ionosphere. The Langmuir probe instrument developed is of a planar geometry and fix biased in the ion saturation region, i.e. negative w.r.t. spacecraft chassis. Operating the Langmuir probe in the ion saturation region avoids excessive spacecraft charging on small spacecraft platforms, while also avoiding high-risk deployables. Specific emphasis is placed on minimizing the physical footprint, power consumption, and measurement noise levels of the instrument, all while maintaining high measurement cadence. In this way, the device is also intended to be functionally dynamic and easily modifiable for future missions requiring similar instrumentation. The effort toward this thesis included circuit design and simulation in National Instruments’ Multisim, printed circuit board layout design in National Instruments’ Ultiboard, instrument firmware development in Texas Instruments’ Code Composer Studio, mechanical design of the system in Dassault’s CATIA and SolidWorks, test article board population, extensive instrument testing, and temperature calibration in a TestEquity thermal chamber

    Development of a Detector Control System Chip

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    Der Large Hadron Collider (LHC) am CERN wird bis 2026 zum High-Luminosity LHC ausgebaut. Diese Erweiterung hat zum Ziel höhere IntensitĂ€ten bei den Kollisionen zu erreichen um die gesammelte LuminositĂ€t um einen Faktor 10 zu erhöhen. Mit dem grösseren Datensatz können die Eigenschaften des Standard Models der Teilchenphysik genauer vermessen werden. Die Experimente mĂŒssen dafĂŒr aktualisiert und aufgerĂŒstet werden. Beim ATLAS Experiment wird der komplette innere Detektor fĂŒr den Betrieb am High-Luminosity LHC mit einem neuen Silizium-Spurdetektor ersetzt. Dieser, ATLAS ITk Detektor genannt, besteht aus mehreren Lagen mit Pixel- und Streifensensoren. FĂŒr den ITk Pixeldetektor wird erstmals auch eine serielle Stromversorgung an einem LHC Experiment verwendet. Die serielle Versorgung hat den Vorteil, dass Leitungen und dadurch Material eingespart werden kann. Jedoch gibt es auch Risiken und neue Entwicklungen werden benötigt. Das Detektorkontrollsystem (DCS) hat die Aufgabe den Detektor und seinen Zustand zu ĂŒberwachen. Das DCS kontrolliert auch den Betrieb des Detektors. Eine Integrierte Schaltung wurde speziell dazu entwickelt. Dieser Pixel Serial Power & Protection (PSPP) genannte Chip misst die Temperatur und Spannung von einem Modul in einer seriellen Versorgungskette. Weiter hat der Chip einen Bypass-Transistor, welcher das Modul kurzschliessen und damit deaktivieren kann. Das erlaubt es einzelne Module in der seriellen Versorgungskette zu steuern, wĂ€hrend die anderen Module weiterhin funktionieren. Die Aktivierung des Bypasses kann automatisch erfolgen, sollte die Temperatur oder Spannung des Moduls zu gross werden. Auf Basis eines existierenden Prototyps wurden wĂ€hrend dieser Arbeit weitere Versionen des PSPP entwickelt. Diese beinhalten alle benötigten Funktionen und können einen Strom von 8 A schalten. Der entwickelte PSPP wurde bis zu einer totalen ionisierenden Dosis von 800 Mrad erfolgreich getestet. Weiter wurden Tests der Resistenz gegenĂŒber strahlenbasierten Bit-Flips durchgefĂŒhrt. Es wurde ein Wirkungsquerschnitt kleiner 1.7 × 10⁻Âč⁷ cmÂČ gemessen. Ein Chip wurde auch in einer Klimakammer bei Temperaturen zwischen (0 und 60) °C wĂ€hrend 42 Tagen erfolgreich betrieben. WĂ€hrend dieses Dauertests wurden keine Fehlfunktionen beobachtet. Der PSPP wurde ausserdem in einem Systemtest mit Sensormodulen und realistischer mechanischer Struktur eingesetzt. Die Funktion des PSPPs war hilfreich bei der Inbetriebnahme und Fehlersuche. Die automatische Bypass-Aktivierung bewahrte die Module vor SchĂ€den. Mit Hilfe der vom PSPP gemessenen Daten wurde die Spezifikation der seriellen Versorgungskette verbessert.The Large Hadron Collider (LHC) at CERN will be updated to the High-Luminosity LHC by 2026. The goal of this update is to achieve higher intensities in the collisions and collect ten times more luminosity than with the LHC. This gives higher statistics to measure with greater precision the parameters of the standard model in particle physics. The ATLAS experiment will receive a completely new inner tracker for operation at the High-Luminosity LHC. This ATLAS ITk detector is a full silicon tracking detector with pixel and strip sensors. A serial power approach is foreseen for the ITk Pixel detector. This reduces the number of services and material, however, has also risks and new challenges. The task of the detector control system (DCS) is to monitor the health of the experiment and control the operation. An integrated circuit was developed for this task. The so-called pixel serial power & protection (PSPP) chip measures the voltage and temperature of a module in the serial power chain. Additionally, it includes a bypass transistor to deactivate a single module if necessary. The bypass is activated automatically in case of over-temperature or over-voltage. This gives full control over each module and allows to recover a serial power chain in case of a faulty module. Based on an existing prototype, new versions of the PSPP were developed for this thesis. They include all required functionalities and can switch a current of 8 A. The developed prototype is functional to a total integrated dose of 800 Mrad, which was tested in X-Ray irradiations. Further, tests were performed to verify the protection against single event upsets causing bit flips in the internal registers. The cross-section of the triplicated registers in the PSPP was measured with a proton test beam and is smaller than 1.7 × 10⁻Âč⁷ cmÂČ . The PSPP prototype successfully resisted temperatures between (0 and 60) °C in a 42-day long climate chamber test. No failure was observed. A system test with prototype modules was built at CERN to verify the concept of the serial power chain. This used realistic services and mechanical structures. The PSPP chip was included in the system test and proofed to be very useful during commissioning and debugging. The bypass and its protection function prevented damage to detector modules. The PSPP delivered useful monitoring data to refine the requirements of the serial power chain

    Uranium Dioxide Actinide Detection Device Support Design for Space Applications

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    Attention concerning the proliferation of nuclear weapons and materials has generated many research initiatives to detect, identify, and locate radiation emitted by actinides. In support of this effort, the `Fission Induced Neutron Detection of Nuclear Materials\u27 (FIND\u27NM) program was established to comprise a joint effort to explore this issue. The objective also co-extends the Air Force Research Laboratory uranium dioxide (UO2) detection sample growth, characterization, and electrical interface research. AFIT\u27s study accomplishes the design and fabrication of a space-tolerant PCB to support a UO2-based neutron detector. Further design considerations are made with the expectation of the platform to be inside an in-orbit satellite. The PCB will interface a satellite, which in turn will relay transferred data to researchers on the ground for later processing. The scope of the research is to provide a low-cost commercial-off-the-shelf solution with signal integrity and operational stability in mind. The study performed by LTC Dugan [16] and Lt Col Young [44] provided the basis from which the project stems. These circuit behavioral characteristics narrowed the components considered to accommodate the low-amplitude and fast-pulse output required from a device. Three distinct amplifier designs were required due to changes in the accepted theoretical electrical characteristics of the sensor. By circuit simulation, the three presented amplifier systems demonstrate the desired output for each sensor model, within a particular envelope of operation. The system can capture, collate, and disseminate data generated while operating within specified parameters. The completed and operational PCB presents a proof-of-concept that Space compliance devices can be made more cost-efficient by utilizing design aspects already included in larger system designs. The flexibility of the FPGA signal processing system can be used to try multiple operating configurations, ultimately resulting in an ASIC to further reduce the cost given large scale deployment of a unique design. Small detection devices like this could be installed on most orbital satellites and transmit data about areas of interest where actinide particle activity is detected

    Millimeter and sub-millimeter wave radiometers for atmospheric remote sensing from CubeSat platforms

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    2018 Fall.Includes bibliographical references.To view the abstract, please see the full text of the document

    Design of Readout Electronics for the DEEP Particle Detector

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    Along with electromagnetic radiation, the Sun also emits a constant stream of charged particles in the form of solar wind. When these particles enter Earth’s atmosphere through a process known as particle precipitation, they can through a series of chemical reactions produce N Ox and HOx gases. These gases are greenhouse gases and deplete the ozone in the mesosphere and upper stratosphere. It is important to quantify the rate of production of these gases to model the potential climate impact. Existing particle detectors in space are suboptimal because they cannot determine the energy flux and pitch angle distribution of precipitating particles. The primary scientific objective of the DEEP project is to design a particle detector instrument that is specifically designed for particle precipitation measurements. This thesis investigates different data acquisition schemes for handling the signal from a pixel detector. The chosen approach is measuring the width of a shaped pulse to quantify the energy of the particle. Known as Time-over-Threshold, a detector circuit board is designed featuring high-speed comparators as threshold discriminators and the NG-MEDIUM FPGA from NanoXplore to implement the data acquisition. Digitizing the comparator pulse width is done with a Time-to-Digital converter (TDC) implemented in the FPGA fabric. Since the difference in pulse width is small for different energies, a high conversion resolution is required. Two high-resolution TDCs are designed and compared, both of which feature a digital counter and a method of interpolating the counter clock period. The first interpolation method applies the use of a multitapped delay line implemented with hard carry chain resources, and the second method oversamples the input with several equally off-phase sampling clocks. A resolution of 302 ps and a differential non-linearity of 3.26 was achieved with the delay line TDC clocked at 100 MHz. An automatic statistical calibration scheme is included to determine the actual delays of the delay line, utilizing a second asynchronous clock to generate uniformly distributed hits. The asynchronous oversampler resolution is clock frequency dependent and provides a 4-fold improvement to the clock period. The differential nonlinearity approaches zero with close matching of the off-phase clocks and operating frequency. A complete firmware design for the data acquisition and rocket telemetry of the detector is proposed and demonstrated. A simulation of the firmware utilizing each TDC topology is conducted and the delay line TDC is demonstrated to be the most accurate at all operating frequencies and thus the recommended TDC for the DEEP data acquisition.Masteroppgave i fysikkPHYS399MAMN-PHY

    Wireless Sensors and Actuators for Structural Health Monitoring of Fiber Composite Materials

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    This work evaluates and investigates the wireless generation and detection of Lamb-waves on fiber-reinforced materials using surface applied or embedded piezo elements. The general target is to achieve wireless systems or sensor networks for Structural Health Monitoring (SHM), a type of Non-Destructive-Evaluation (NDE). In this sense, a fully wireless measurement system that achieves power transmission implementing inductive coils is reported. This system allows a reduction of total system weight as well as better integration in the structure. A great concern is the characteristics of the material, in which the system is integrated, because the properties can have a direct impact on the strength of the magnetic field. Carbon-Fiber-Reinforced-Polymer (CFRP) is known to behave as an electrical conductor, shielding radio waves with increasing worse effects at higher frequencies. Due to the need of high power and voltage, interest is raised to evaluate the operation of piezo as actuators at the lower frequency ranges. To this end, actuating occurs at the International Scientific and Medical (ISM) band of 125 kHz or low-frequency (LF) range. The feasibility of such system is evaluated extensively in this work. Direct excitation, is done by combining the actuator bonded to the surface or embedded in the material with an inductive LF coil and setting the circuit in resonance. A more controlled possibility, also explored, is the use of electronics to generate a Hanning-windowed-sine to excite the PWAS in a narrow spectrum. In this case, only wireless power is transmitted to the actuator node, and this lastly implements a Piezo-driver to independently excite Lamb-waves. Sensing and data transfer, on the other hand, is done using the high-frequency (HF) 13.56 MHz. The HF range covers the requirements of faster sampling rate and lower energy content. A re-tuning of the antenna coils is performed to obtain better transmission qualities when the system is implemented in CFRP. Several quasi-isotropic (QI) CFRP plates with sensor and actuator nodes were made to measure the quality of transmission and the necessary energy to stimulate the actuator-sensor system. In order to produce baselines, measurements are prepared from a healthy plate under specific temperature and humidity conditions. The signals are evaluated to verify the functionality in the presence of defects. The measurements demonstrate that it is possible to wirelessly generate Lamb-waves while early results show the feasibility to determine the presence of structural failure. For instance, progress has been achieved detecting the presence of a failure in the form of drilled holes introduced to the structure. This work shows a complete set of experimental results of different sensor/-actuator nodes
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