MINT - Microfluidic Netlist

Fluigi is a microfluidic design framework that allows researchers to realize abstract descriptions of liquid flow relationships automatically as physical devices and corresponding control software. Its goal is to provide synthetic biology researchers with the tools to use microfluidics for novel computation, discovery, and test applications. A critical component of this work-flow is MINT, a format for describing the microfluidic components and the connectivity of the control and flow layers in the microfluidic device. This work describes MINT and where it falls in the larger Fluigi software flow

A CLOSER LOOK AT A PATH DOMINATION NUMBER IN GRID GRAPHS

This article exposes the combinatorial formula that determines the pathdomination number in a grid graph and discusses some of its properties. Seven propertiesare derived regarding the path domination number of grid graphs. Furthermore, some additional properties as direct consequences of the derived main properties are alsodiscussed

ERA*: Enhanced Relaxed A* algorithm for Solving the Shortest Path Problem in Regular Grid Maps

This paper introduces a novel algorithm for solving the point-to-point shortest path problem in a static regular 8-neighbor connectivity (G8) grid. This algorithm can be seen as a generalization of Hadlock algorithm to G8 grids, and is shown to be theoretically equivalent to the relaxed $A^*$ ($RA^*$) algorithm in terms of the provided solution's path length, but with substantial time and memory savings, due to a completely different computation strategy, based on defining a set of lookup matrices. Through an experimental study on grid maps of various types and sizes (1290 runs on 43 maps), it is proven to be 2.25 times faster than $RA^*$ and 17 times faster than the original $A^*$, in average. Moreover, it is more memory-efficient, since it does not need to store a G score matrix

Finding Shortest Paths With Computational Geometry

We present a heuristic search algorithm for the Rd Manhattan shortest path problem that achieves front-to-front bidirectionality in subquadratic time. In the study of bidirectional search algorithms, front-to-front heuristic computations were thought to be prohibitively expensive (at least quadratic time complexity); our algorithm runs in O(n logd n) time and O(n logd−1 n) space, where n is the number of visited vertices. We achieve this result by embedding the problem in Rd+1 and identifying heuristic calculations as instances of a dynamic closest-point problem, to which we then apply methods from computational geometry

Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation

The electronic design automation (EDA) tools are a specific set of software that play important roles in modern integrated circuit (IC) design. These software automate the design processes of IC with various stages. Among these stages, two important EDA design tools are the focus of this research: floorplanning and global routing. Specifically, the goal of this study is to parallelize these two tools such that their execution time can be significantly shortened on modern multi-core and graphics processing unit (GPU) architectures. The GPU hardware is a massively parallel architecture, enabling thousands of independent threads to execute concurrently. Although a small set of EDA tools can benefit from using GPU to accelerate their speed, most algorithms in this field are designed with the single-core paradigm in mind. The floorplanning and global routing algorithms are among the latter, and difficult to render any speedup on the GPU due to their inherent sequential nature. This work parallelizes the floorplanning and global routing algorithm through a novel approach and results in significant speedups for both tools implemented on the GPU hardware. Specifically, with a complete overhaul of solution space and design space exploration, a GPU-based floorplanning algorithm is able to render 4-166X speedup, while achieving similar or improved solutions compared with the sequential algorithm. The GPU-based global routing algorithm is shown to achieve significant speedup against existing state-of-the-art routers, while delivering competitive solution quality. Importantly, this parallel model for global routing renders a stable solution that is independent from the level of parallelism. In summary, this research has shown that through a design paradigm overhaul, sequential algorithms can also benefit from the massively parallel architecture. The findings of this study have a positive impact on the efficiency and design quality of modern EDA design flow