9 research outputs found

    СТАЦИОНАРНОЕ РАСПРЕДЕЛЕНИЕ ТАНДЕМНОЙ СИСТЕМЫ МАССОВОГО ОБСЛУЖИВАНИЯ С ДОПОЛНИТЕЛЬНЫМИ ПОТОКАМИ НА СТАНЦИЯХ

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    A tandem queueing system consisting of a finite number of multi-server stations without buffers is analized. The input flow at the first station is a ???????????? (Markovian arrival process). The customers from this flow aim to be served at all stations of the tandem. For any station, besides transit customers proceeding from the previous station, an additional ???????????? flow of new customers arrives at this station directly. Customers from this flow aim to be served at this station and all subsequent stations of the tandem. The service times of customer at the stations are exponentially distributed with the service rate depending of number of the station. The algorithms for culculation of stationary distributions and the loss probabilities associated with the tandem are given.Исследуется стационарное поведение тандемной системы, состоящей из конечного числа многолинейных станций без буферов. В систему поступает марковский поток запросов, каждый из которых должен получить обслуживание на всех станциях тандема. Кроме транзитных запросов, на каждую станцию тандема поступает дополнительный марковский поток запросов, которые должны обслужиться на этой и всех последующих станциях тандема. Времена обслуживания запросов на станциях распределены по экспоненциальному закону с параметрами, зависящими от номера станции. Приводятся алгориты для вычисления стационарного распределения тандема и вероятностей потерь, ассоциированных с тандемом

    A Review on Software Performance Analysis for Early Detection of Latent Faults in Design Models

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    Organizations and society could face major breakdown if IT strategies do not comply with performance requirements. This is more so in the era of globalization and emergence of technologies caused more issues. Software design models might have latent and potential issues that affect performance of software. Often performance is the neglected area in the industry. Identifying performance issues in the design phase can save time, money and effort. Software engineers need to know the performance requirements so as to ensure quality software to be developed. Software performance engineering a quantitative approach for building software systems that can meet performance requirements. There are many design models based on UML, Petri Nets and Product-Forms. These models can be used to derive performance models that make use of LQN, MSC, QNM and so on. The design models are to be mapped to performance models in order to predict performance of system early and render valuable feedback for improving quality of the system. Due to emerging distributed technologies such as EJB, CORBA, DCOM and SOA applications became very complex with collaboration with other software. The component based software systems, software systems that are embedded, distributed likely need more systematic performance models that can leverage the quality of such systems. Towards this end many techniques came into existence. This paper throws light into software performance analysis and its present state-of-the-art. It reviews different design models and performance models that provide valuable insights to make well informed decisions

    A tractable analytical model for large-scale congested protein synthesis networks

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    This paper presents an analytical model, based on finite capacity queueing network theory, to evaluate congestion in protein synthesis networks. These networks are modeled as a set of single server bufferless queues in a tandem topology. This model proposes a detailed state space formulation, which provides a fine description of congestion and contributes to a better understanding of how the protein synthesis rate is deteriorated. The model approximates the marginal stationary distributions of each queue. It consists of a system of linear and quadratic equations that can be decoupled. The numerical performance of this method is evaluated for networks with up to 100,000 queues, considering scenarios with various levels of congestion. It is a computationally efficient and scalable method that is suitable to evaluate congestion for large-scale networks. Additionally, this paper generalizes the concept of blocking: blocking events can be triggered by an arbitrary set of queues. This generalization allows for a variety of blocking phenomena to be modeled.Swiss National Science Foundation (Grant 205320-117581

    Evaluation of software architecture using fuzzy colored Petri nets

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    Software Architecture (SA) is one of the most important artifacts for life cycle of a software system because it incorporates some important decisions and principles for the system development. On the other hand, developing the systems based on uncertain and ambiguous requirement has been increased, significantly. Therefore, there have been significant attentions on SA requirements. In this paper, we present a new method for evaluation of performance characteristics based on a use case, response time, and queue length of SA. Since there are some ambiguities associated with considered systems, we use the idea of Fuzzy UML (F-UML) diagrams. In addition, these diagrams have been enriched with performance annotations using proposed Fuzzy-SPT sub profile, the extended version of SPT profile proposed by OMG. Then, these diagrams are mapped into an executable model based on Fuzzy Colored Petri Nets (FCPN) and finally the performance metrics are calculated using the proposed algorithms. We have implemented CPN-Tools for creating and evaluating the FCPN model

    A tractable analytical model for large-scale congested protein synthesis networks

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    This paper presents a finite capacity queueing network model to evaluate congestion in protein synthesis networks. These networks are modeled as single server bufferless queues in a tandem topology. The model approximates the marginal stationary distributions of each queue. It consists of a system of linear and quadratic equations that can be decoupled. It is therefore a tractable and scalable method that is suitable for large-scale networks. This model proposes a detailed state space formulation, which provides a fine description of congestion and contributes to a better understanding of how the protein synthesis rate is deteriorated. This paper also generalizes the concept of blocking: blocking events can be triggered by an arbitrary set of queues. The numerical performance of this method is evaluated for networks with up to 100,000 queues, considering scenarios with various levels of congestion. Since tandem topology networks are of interest for a variety of application fields, the numerical efficiency and scalability of this model is of wide interest

    An analytic finite capacity queueing network model capturing blocking, congestion and spillbacks

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    Analytic queueing network models often assume infinite capacity for all queues. For real systems this infinite capacity assumption does not hold, but is often maintained due to the difficulty of grasping the between-queue correlation structure present in finite capacity networks. This correlation structure helps explain bottleneck effects and spillbacks, the latter being of special interest in networks containing loops because they are a source of potential deadlock. We present an analytic queueing network model which acknowledges the finite capacity of the different queues. By explicitly modeling the blocking phase the model yields a description of the congestion effects. The model is adapted for multiple server finite capacity queueing networks with an arbitrary topology and blocking-after-service. A decomposition method allowing the evaluation of the model is described. The method is validated, by comparison to both pre-existing methods and simulation results. A real application to the study of patient flow in a network of operative and post-operative units of the Geneva University Hospital is also presented

    Optimizations and Cost Models for multi-core architectures: an approach based on parallel paradigms

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    The trend in modern microprocessor architectures is clear: multi-core chips are here to stay, and researchers expect multiprocessors with 128 to 1024 cores on a chip in some years. Yet the software community is slowly taking the path towards parallel programming: while some works target multi-cores, these are usually inherited from the previous tools for SMP architectures, and rarely exploit specific characteristics of multi-cores. But most important, current tools have no facilities to guarantee performance or portability among architectures. Our research group was one of the first to propose the structured parallel programming approach to solve the problem of performance portability and predictability. This has been successfully demonstrated years ago for distributed and shared memory multiprocessors, and we strongly believe that the same should be applied to multi-core architectures. The main problem with performance portability is that optimizations are effective only under specific conditions, making them dependent on both the specific program and the target architecture. For this reason in current parallel programming (in general, but especially with multi-cores) optimizations usually follows a try-and-decide approach: each one must be implemented and tested on the specific parallel program to understand its benefits. If we want to make a step forward and really achieve some form of performance portability, we require some kind of prediction of the expected performance of a program. The concept of performance modeling is quite old in the world of parallel programming; yet, in the last years, this kind of research saw small improvements: cost models to describe multi-cores are missing, mainly because of the increasing complexity of microarchitectures and the poor knowledge of specific implementation details of current processors. In the first part of this thesis we prove that the way of performance modeling is still feasible, by studying the Tilera TilePro64. The high number of cores on-chip in this processor (64) required the use of several innovative solutions, such as a complex interconnection network and the use of multiple memory interfaces per chip. For these features the TilePro64 can be considered an insight of what to expect in future multi-core processors. The availability of a cycle-accurate simulator and an extensive documentation allowed us to model the architecture, and in particular its memory subsystem, at the accuracy level required to compare optimizations In the second part, focused on optimizations, we cover one of the most important issue of multi-core architectures: the memory subsystem. In this area multi-core strongly differs in their structure w.r.t off-chip parallel architectures, both SMP and NUMA, thus opening new opportunities. In detail, we investigate the problem of data distribution over the memory controllers in several commercial multi-cores, and the efficient use of the cache coherency mechanisms offered by the TilePro64 processor. Finally, by using the performance model, we study different implementations, derived from the previous optimizations, of a simple test-case application. We are able to predict the best version using only profiled data from a sequential execution. The accuracy of the model has been verified by experimentally comparing the implementations on the real architecture, giving results within 1 − 2% of accuracy
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