A Comprehensive Mixed-Mode Time-Domain Load- and Source-Pull Measurement System

We present a novel test set devised for nonlinear balanced device characterization using load-pull techniques. The system is capable of measuring the voltage and current waveforms at the calibration reference planes while independently tuning the device under test (DUT) source and load differential- and common-mode terminations. The test set is designed to address present and future large-signal multiport measurement needs, easing the characterization task while developing new multiport active device

A user-friendly system to measure electromyographic activity of dancers

A data acquisition system aided by virtual instrumentation was developed to measure electromyographic activity of the dancers. The system is composed of three main components: (1) Analog front-end with signal conditioning, (2) USB serial interface based A/D conversion, and (3) virtual instrumentation designed in LabView tools. The proposed system is able to accurately collect the magnitude of jump force and displayed the data using virtual instruments with alarm functions. The signal path is well-conditioned and processed, which makes the device suitable for feasibility studies for future research

Development of a Low-Noise High Common-Mode-Rejection Instrumentation Amplifier

Several previously used instrumentation amplifier circuits were examined to find limitations and possibilities for improvement. One general configuration is analyzed in detail, and methods for improvement are enumerated. An improved amplifier circuit is described and analyzed with respect to common mode rejection and noise. Experimental data are presented showing good agreement between calculated and measured common mode rejection ratio and equivalent noise resistance. The amplifier is shown to be capable of common mode rejection in excess of 140 db for a trimmed circuit at frequencies below 100 Hz and equivalent white noise below 3.0 nv/square root of Hz above 1000 Hz

Inverter-Based Low-Voltage CCII- Design and Its Filter Application

This paper presents a negative type second-generation current conveyor (CCII-). It is based on an inverter-based low-voltage error amplifier, and a negative current mirror. The CCII- could be operated in a very low supply voltage such as ±0.5V. The proposed CCII- has wide input voltage range (±0.24V), wide output voltage (±0.24V) and wide output current range (±24mA). The proposed CCII- has no on-chip capacitors, so it can be designed with standard CMOS digital processes. Moreover, the architecture of the proposed circuit without cascoded MOSFET transistors is easily designed and suitable for low-voltage operation. The proposed CCII- has been fabricated in TSMC 0.18μm CMOS processes and it occupies 1189.91 x 1178.43μm2 (include PADs). It can also be validated by low voltage CCII filters

Specifying and calibrating instrumentations for wideband electronic power measurements

The wideband electric power measurement related topics of electronic wattmeter calibration and specification are discussed. Tested calibration techniques are described in detail. Analytical methods used to determine the bandwidth requirements of instrumentation for switching circuit waveforms are presented and illustrated with examples from electric vehicle type applications. Analog multiplier wattmeters, digital wattmeters and calculating digital oscilloscopes are compared. The instrumentation characteristics which are critical to accurate wideband power measurement are described

Instrumentation for the coriolis acceleration platform

Instrumentation system for coriolis acceleration test platfor

Design of a dual OPAMP low offset integrator system for plasma reactor

In a fusion reactor, where tokamaks are used to confine the plasma using toroidal and poloidal magnetic fields, highly accurate magnetic measurements are a necessity for automatic control. However, due to extremities in temperature, acquiring uncorrupted signals become a challenging task. Presented in this thesis is a design of a twin operational amplifier based low offset integrating system to eliminate any error in measurement due to temperature dependent DC offset. This integrator system comprises mainly three stages after the inductive sensor. The first stage consists of a dual integrator in which the output signal from the sensor was fed to one integrator and the input terminals of the other integrator were grounded. An instrumentation amplifier which has a very high common mode rejection ratio and large input impedance was implemented in the second stage to find the differential signal between the outputs of the two integrators. Any noise arising in the environment was eliminated in the next stage by a Digital Signal Processor based Finite Impulse Response Low-Pass Filter. The first two stages of the design were simulated by using Multisim Circuit Design Suite. The low-pass filtering stage was realized on a Texas Instruments TMS320C6713 starter kit using Kaiser Windowing technique to achieve a sharp cut-off at 780Hz. To obtain a full layout of the operational amplifier based design Cadence Electronic Design Automation UMC_180 nm tool was used. The primary objective of DC offset elimination was verified through the results. KEY WORDS: Inductive Sensor, Operational Amplifier, Integrator, Instrumentation Amplifier, Low-pass Filte

An Offset Cancelation Technique for Latch Type Sense Amplifiers

An offset compensation technique for a latch type sense amplifier is proposed in this paper. The proposed scheme is based on the recalibration of the charging/discharging current of the critical nodes which are affected by the device mismatches. The circuit has been designed in a 65 nm CMOS technology with 1.2 V core transistors. The auto-calibration procedure is fully digital. Simulation results are given verifying the operation for sampling a 5 Gb/s signal dissipating only 360 uW

Index to NASA Tech Briefs, January - June 1967

Technological innovations for January-June 1967, abstracts and subject inde