Performance Analysis of Secure Integrated Circuits using Blowfish Algorithm

Security is an essential feature of Information Communication Technology (ICT). Information has to be encrypted at the transmitter side to maintain secrecy and decrypted at the receiver side to retrieve the original information for secure data transmission over insecure computer data communication networks. This paper analyzes the performance metrics of blowfish algorithm with and without Wave Dynamic Differential Logic (WDDL) style to incorporate security against differential power analysis. It compares Encryption Time (Et), Decryption Time (Dt) and Total Time (Tt) of Blowfish, Modified Blowfish with and without WDDL logic for secure Integrated Circuits (SIC) [7, 8]. Modified Blowfish with and without WDDL logic yielded good results compared to Blowfish with and without WDDL logic implementation . This paper is implemented using Xilinx webpack9.2i with Verilog Hardware Description language (HDL)

Using a Light-Based Power Source to Defeat Power Analysis Attacks

Power analysis attacks exploit the correlation between the information processed by an electronic system and the power consumption of the system. By powering an electronic system with an optical power source, we can prevent meaningful information from being leaked to the power pins and captured in power traces. The relatively constant current draw of the optical power source hides any variability in the power consumption of the target system caused by the logic gates\u27 switching activity of the system as observed at the power pins. This thesis will provide evidence to show that using an optical power source should make it impossible for an attacker to extract meaningful information from the power trace of the monitored system, as measured at the power pins

Power Side Channels in Security ICs: Hardware Countermeasures

Power side-channel attacks are a very effective cryptanalysis technique that can infer secret keys of security ICs by monitoring the power consumption. Since the emergence of practical attacks in the late 90s, they have been a major threat to many cryptographic-equipped devices including smart cards, encrypted FPGA designs, and mobile phones. Designers and manufacturers of cryptographic devices have in response developed various countermeasures for protection. Attacking methods have also evolved to counteract resistant implementations. This paper reviews foundational power analysis attack techniques and examines a variety of hardware design mitigations. The aim is to highlight exposed vulnerabilities in hardware-based countermeasures for future more secure implementations

Analysis and countermeasures to side-channel attacks: a hardware design perspective

With the Internet-of-Things revolution, the security assessment against implementation attacks has become a critical concern not only for hardware accelerators but also for embedded CPUs executing cryptographic primitives. Starting from an FPGA implementation of the open-hardware ORPSoC system-on-chip running a software version of the AES, this paper explores two implications of the side-channel information leakage that impact the hardware design of general purpose computing platforms. First, we explore the mapping between the side-channel information leakage and the microarchitectural components that are contributing to it. Second, we discuss the variations in the observability of the side-channel information leakage at post-synthesis an

Automatic Insertion of DPA Countermeasures

Differential Power Analysis (DPA) attacks find a statistical correlation between the power consumption of a cryptographic device and intermediate values within the computation. Randomization of intermediate values breaks statistical dependence and thus prevents such attacks. The current state of the art in countermeasures involves manual manipulation of low-level assembly language to insert random masking. This paper introduces an algorithm to automate the process allowing the development of compilers capable of protecting programs against DPA

Towards Side-Channel Resistant Block Cipher Usage or Can We Encrypt Without Side-Channel Countermeasures?

Based on re-keying techniques by Abdalla, Bellare, and Borst [1,2], we consider two black-box secure block cipher based symmetric encryption schemes, which we prove secure in the physically observable cryptography model. They are proven side-channel secure against a strong type of adversary that can adaptively choose the leakage function as long as the leaked information is bounded. It turns out that our simple construction is side-channel secure against all types of attacks that satisfy some reasonable assumptions. In particular, the security turns out to be negligible in the block cipher’s block size n, for all attacks. We also show that our ideas result in an interesting alternative to the implementation of block ciphers using different logic styles or masking countermeasures